After few weeks of experiments and one dead FPGA chip I finished about 1/5 of my LCD project. At last I tuned all LCD timings and LCD screen can display image from “video RAM”. For this moment “video RAM” is represented by flash ROM chip. At first I had lots of bugs (I’ve lost one byte of information, three lines were missing, the line in the middle of the screen, all screen moved one line down). One line down is not a but, but the feature of the LCD screen. It begins scan from the second line after HS.
Here is the image of my workplace (the LCD is with all the bugs): power supply (+5V and ~-15V), 20.48MHz master clock oscillator (the exact frequency is not essential- the clock is divided by FPGA), ATMEL 29C010A (as video RAM) and Altera FLEX EPF10K10TC144-3 FPGA. Red line on the breadboard is 47K pull-up resistors for data lines.
Here is bigger image of the LCD screen. As you can see the bugs are visible. One bug is from MS Visual Basic program- I’ve made mistake in image processing- lost one screen line generating video bitmap. In new version of software I fixed this bug.
Now I fixed the bugs (english blog is not realtime) and here is fixed image:
Now I need to change ROM to RAM and create some USB interface for my experiments. I do not want to use LPT port anymore.
P.S. That “angry horse” is from Japan animation “Words Worth”. And he is most famous in an Internet fad for the quote, “Your resistance only makes my penis harder!”. “Fad” is an Internet phenomenon occuring when something becomes extremely popular, often quite suddenly, through the word-of-mouth and self-publishing made feasible by the Internet.