Tag Archives: CPLD/FPGA

After few weeks of experiments and one dead FPGA chip I finished about 1/5 of my LCD project. At last I tuned all LCD timings and LCD screen can display image from “video RAM”. For this moment “video RAM” is … Continue reading →

As I mentioned in previous posts, one company supplied me by few Altera Cyclone II (EP2C5T144C6N) FPGAs. All these chips were soldered to some rejected circuit boards. Board were damaged by improper soldering, mainly by overheating and PCB track unstuck … Continue reading →

I was planing big article about FPGA chips and was testing all circuits when suddenly connected on Altera Flex I/O pin to LCD bias power supply. This was the end of my Altera FLEX. Here is the picture of my … Continue reading →

I decided to put all ISP/JTAG cable circuit diagrams (schematics) in one page for easy navigation. The schematics are gathered in the internet in various web pages and datasheets. Cables are not designed by me, but I made some of … Continue reading →

Some introducing to programmable logic chips or just my throes… I was forced to learn about programmable logic. The mental outfit is zero. I only know that there are such devices. The most simple and oldest CPLD (complex programmable logic … Continue reading →

To program CPLD programmable logic) devices you only need very simple isp download cable. The cable is simple if we use computer’s printer port. For my experiments I removed Lattice isp2032VE chip from old wireless router and soldered it to … Continue reading →