Testing Commodore 6526/8520 copy in CPLD

There is quite expensive obsolete chip from various Commodore computers and peripherials- CIA/PIA MOS 6526 and a bit changed 8520 used in Amiga computers. This is “complex” peripherial interface adapter chip for 6502 processor or 68K chipset.
It is quite complex, as it has: 16 individual programmed I/O lines, 2 independent, linkable timers, real time clock timer/counter, shift register for serial interface and some other stuff. As this chip is for “interface”, some of the pins goes outside computer and connects to various other devices or… some strange objects like metal pins or pens. S, short circuit, ESD spikes can kill these chips. When I lived in Soviet Union, I blow Amiga 8520 chip and I had my Amiga shelved for several years!
Now is still possible to buy these chips- sometime NOS (very expensive), sometime good pullouts, but sometimes fake ones. And you have to spend over 25USD for just one chip. Maybe is good variant to buy DEAD computer in hope, that chip may be fine.

I am cleaning, testing and rearranging my old computer collection and I decided to repair some of them because now I have more money and more knowlegde. And I have spare CPLD boards from Russian Igrosoft computers. So, one day I decided to build some test rig and build my own CIA/PIA in CPLD (it is 5V TTL compatible).

Here is the CPLD CIA/PIA workplace:
PIA 6526 CPLD copy
This computer has both 6526 dead. Left CIA is only partially emulated- so I used smaller CHIP. Meanwhile right one is more complex. This is not only timers, int, but also keyboard interface.

Altera Quartus MOS 6526 commodore chip
I wrote everything using Altera- Intel Quartus software. It is free for MAX series CPLD. I started project in 9th version of software, but encountered strange bugs and also, my hardware description do not fit to chip. Meanwhile, newer version was fine.

wire wrap technology- CPLD connected to commodore 64
I am using special self made PCB with precision sockets and pins. All connection to CPLD boards are made using wire wrap technology. I think it is best technology to connected hundreds of wires in not permanent way. I can redo connection in case I mix something.

Other PIA MOS6526 connected to smaller CPLD MAX Altera
This is smaller CPLD. Only timer and fontbase selector is “build” inside it.

C64 screenshot: timer INT keyboard interface ready in CPLD
From black screen I have working keyboard (cursor is OK, just in photo is not visible), timers and interrupt.

But… I found in trash completed PCB of Commodore 128 with working CIA on board. So I abandoned this project for a while. Maybe in near future, maybe never.

Source code in Verilog hardware description language is available on demand.

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