ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 1


   1              		.cpu cortex-m3
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 1
   9              		.eabi_attribute 34, 1
  10              		.eabi_attribute 18, 4
  11              		.file	"stm32f1xx_hal_rcc.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.RCC_Delay,"ax",%progbits
  16              		.align	1
  17              		.syntax unified
  18              		.thumb
  19              		.thumb_func
  20              		.fpu softvfp
  22              	RCC_Delay:
  23              	.LFB78:
  24              		.file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c"
   1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
   2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ******************************************************************************
   3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @file    stm32f1xx_hal_rcc.c
   4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @author  MCD Application Team
   5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief   RCC HAL module driver.
   6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *          This file provides firmware functions to manage the following
   7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *          functionalities of the Reset and Clock Control (RCC) peripheral:
   8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *           + Initialization and de-initialization functions
   9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *           + Peripheral Control functions
  10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
  11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @verbatim
  12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ==============================================================================
  13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****                       ##### RCC specific features #####
  14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ==============================================================================
  15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..]
  16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       After reset the device is running from Internal High Speed oscillator
  17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled,
  18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       and all peripherals are off except internal SRAM, Flash and JTAG.
  19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses;
  20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           all peripherals mapped on these buses are running at HSI speed.
  21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
  22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) All GPIOs are in input floating state, except the JTAG pins which
  23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           are assigned to be used for debug purpose.
  24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..] Once the device started from reset, the user application has to:
  25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) Configure the clock source to be used to drive the System clock
  26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           (if the application needs higher frequency/performance)
  27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) Configure the System clock frequency and Flash settings
  28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) Configure the AHB and APB buses prescalers
  29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) Enable the clock for the peripheral(s) to be used
  30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) Configure the clock source(s) for peripherals whose clocks are not
  31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           derived from the System clock (I2S, RTC, ADC, USB OTG FS)
  32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****                       ##### RCC Limitations #####
  34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ==============================================================================
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 2


  35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..]
  36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       A delay between an RCC peripheral clock enable and the effective peripheral
  37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       enabling should be taken into account in order to manage the peripheral read/write
  38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       from/to registers.
  39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (+) This delay depends on the peripheral mapping.
  40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         (++) AHB & APB peripherals, 1 dummy read is necessary
  41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..]
  43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       Workarounds:
  44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
  45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
  46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @endverbatim
  48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ******************************************************************************
  49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @attention
  50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
  51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * All rights reserved.</center></h2>
  53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
  54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * This software component is licensed by ST under BSD 3-Clause license,
  55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * the "License"; You may not use this file except in compliance with the
  56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * License. You may obtain a copy of the License at:
  57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *                        opensource.org/licenses/BSD-3-Clause
  58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
  59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ******************************************************************************
  60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
  61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
  63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #include "stm32f1xx_hal.h"
  64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @addtogroup STM32F1xx_HAL_Driver
  66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @{
  67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
  68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @defgroup RCC RCC
  70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** * @brief RCC HAL module driver
  71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @{
  72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
  73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
  75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
  77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
  78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants
  79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****  * @{
  80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****  */
  81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
  82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @}
  83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
  84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
  85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros
  86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @{
  87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
  88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #define MCO1_CLK_ENABLE()     __HAL_RCC_GPIOA_CLK_ENABLE()
  90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #define MCO1_GPIO_PORT        GPIOA
  91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #define MCO1_PIN              GPIO_PIN_8
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 3


  92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
  94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @}
  95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
  96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
  98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
  99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @{
 100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
 102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @}
 103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
 106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** static void RCC_Delay(uint32_t mdelay);
 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /* Exported functions --------------------------------------------------------*/
 109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
 111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @{
 112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
 115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *  @brief    Initialization and Configuration functions
 116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
 117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @verbatim
 118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ===============================================================================
 119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****            ##### Initialization and de-initialization functions #####
 120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ===============================================================================
 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..]
 122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       This section provides functions allowing to configure the internal/external oscillators
 123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1
 124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       and APB2).
 125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..] Internal/external clock and PLL configuration
 127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through
 128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           the PLL as System clock source.
 129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC
 130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           clock source.
 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) HSE (high-speed external), 4 to 24 MHz (STM32F100xx) or 4 to 16 MHz (STM32F101x/STM32F102
 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           through the PLL as System clock source. Can be used also as RTC clock source.
 134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
 136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) PLL (clocked by HSI or HSE), featuring different output clocks:
 138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         (++) The first output is used to generate the high speed system clock (up to 72 MHz for STM
 139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         (++) The second output is used to generate the clock for the USB OTG FS (48 MHz)
 140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
 142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           and if a HSE clock failure occurs(HSE used directly or through PLL as System
 143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           clock source), the System clocks automatically switched to HSI and an interrupt
 144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           is generated if enabled. The interrupt is linked to the Cortex-M3 NMI
 145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           (Non-Maskable Interrupt) exception vector.
 146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) MCO1 (microcontroller clock output), used to output SYSCLK, HSI,
 148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           HSE or PLL clock (divided by 2) on PA8 pin + PLL2CLK, PLL3CLK/2, PLL3CLK and XTI for STM3
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 4


 149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..] System, AHB and APB buses clocks configuration
 151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
 152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           HSE and PLL.
 153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           The AHB clock (HCLK) is derived from System clock through configurable
 154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           prescaler and used to clock the CPU, memory and peripherals mapped
 155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
 156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           from AHB clock through configurable prescalers and used to clock
 157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           the peripherals mapped on these buses. You can use
 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           "@ref HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
 159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       -@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           (+@) RTC: RTC clock can be derived either from the LSI, LSE or HSE clock
 162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****               divided by 128.
 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           (+@) USB OTG FS and RTC: USB OTG FS require a frequency equal to 48 MHz
 164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****               to work correctly. This clock is derived of the main PLL through PLL Multiplier.
 165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           (+@) I2S interface on STM32F105x/STM32F107x can be derived from PLL3CLK
 166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           (+@) IWDG clock which is always the LSI clock.
 167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       (#) For STM32F10xxx, the maximum frequency of the SYSCLK and HCLK/PCLK2 is 72 MHz, PCLK1 36 M
 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           For STM32F100xx, the maximum frequency of the SYSCLK and HCLK/PCLK1/PCLK2 is 24 MHz.
 170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           Depending on the SYSCLK frequency, the flash latency should be adapted accordingly.
 171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @endverbatim
 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @{
 173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /*
 176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   Additional consideration on the SYSCLK based on Latency settings:
 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         +-----------------------------------------------+
 178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         | Latency       | SYSCLK clock frequency (MHz)  |
 179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         |---------------|-------------------------------|
 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         |0WS(1CPU cycle)|       0 < SYSCLK <= 24        |
 181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         |---------------|-------------------------------|
 182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         |1WS(2CPU cycle)|      24 < SYSCLK <= 48        |
 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         |---------------|-------------------------------|
 184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         |2WS(3CPU cycle)|      48 < SYSCLK <= 72        |
 185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         +-----------------------------------------------+
 186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Resets the RCC clock configuration to the default reset state.
 190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The default reset state of the clock configuration is given below:
 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - HSI ON and used as system clock source
 192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - HSE, PLL, PLL2 and PLL3 are OFF
 193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - AHB, APB1 and APB2 prescaler set to 1.
 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - CSS and MCO1 OFF
 195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - All interrupts disabled
 196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - All flags are cleared
 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   This function does not modify the configuration of the
 198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - Peripheral clocks
 199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            - LSI, LSE and RTC clocks
 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval HAL_StatusTypeDef
 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void)
 203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
 204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
 205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 5


 206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get Start Tick */
 207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Set HSION bit */
 210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   SET_BIT(RCC->CR, RCC_CR_HSION);
 211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Wait till HSI is ready */
 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET)
 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       return HAL_TIMEOUT;
 218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Set HSITRIM bits to the reset value */
 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, (0x10U << RCC_CR_HSITRIM_Pos));
 223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get Start Tick */
 225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Reset CFGR register */
 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_REG(RCC->CFGR);
 229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Wait till clock switch is ready */
 231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET)
 232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       return HAL_TIMEOUT;
 236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Update the SystemCoreClock global variable */
 240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   SystemCoreClock = HSI_VALUE;
 241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Adapt Systick interrupt period */
 243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (HAL_InitTick(uwTickPrio) != HAL_OK)
 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     return HAL_ERROR;
 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get Start Tick */
 249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Second step is to clear PLLON bit */
 252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Wait till PLL is disabled */
 255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET)
 256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       return HAL_TIMEOUT;
 260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 6


 263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Ensure to reset PLLSRC and PLLMUL bits */
 264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_REG(RCC->CFGR);
 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get Start Tick */
 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Reset HSEON & CSSON bits */
 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_CSSON);
 271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Wait till HSE is disabled */
 273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != RESET)
 274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       return HAL_TIMEOUT;
 278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Reset HSEBYP bit */
 282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
 283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_PLL2_SUPPORT)
 285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get Start Tick */
 286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Clear PLL2ON bit */
 289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON);
 290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Wait till PLL2 is disabled */
 292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) != RESET)
 293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       return HAL_TIMEOUT;
 297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* RCC_PLL2_SUPPORT */
 300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_PLLI2S_SUPPORT)
 302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get Start Tick */
 303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Clear PLL3ON bit */
 306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON);
 307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Wait till PLL3 is disabled */
 309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) != RESET)
 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
 312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       return HAL_TIMEOUT;
 314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* RCC_PLLI2S_SUPPORT */
 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1)
 319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Reset CFGR2 register */
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 7


 320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_REG(RCC->CFGR2);
 321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* RCC_CFGR2_PREDIV1 */
 322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Reset all CSR flags */
 324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   SET_BIT(RCC->CSR, RCC_CSR_RMVF);
 325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Disable all interrupts */
 327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   CLEAR_REG(RCC->CIR);
 328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return HAL_OK;
 330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
 333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Initializes the RCC Oscillators according to the specified parameters in the
 334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         RCC_OscInitTypeDef.
 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
 336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         contains the configuration information for the RCC Oscillators.
 337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The PLL is not disabled when used as system clock.
 338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The PLL is not disabled when USB OTG FS clock is enabled (specific to devices with USB 
 339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
 340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         supported by this macro. User should request a transition to LSE Off
 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         first and then LSE On or LSE Bypass.
 342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
 343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         supported by this macro. User should request a transition to HSE Off
 344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         first and then HSE On or HSE Bypass.
 345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval HAL status
 346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
 349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
 350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t pll_config;
 351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check Null pointer */
 353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (RCC_OscInitStruct == NULL)
 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     return HAL_ERROR;
 356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
 359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*------------------------------- HSE Configuration ------------------------*/
 362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the parameters */
 365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe
 368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL
 370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE
 372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         return HAL_ERROR;
 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 8


 377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Set the new HSE configuration ---------------------------------------*/
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Check the HSE State */
 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 388:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till HSE is ready */
 389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 390:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 394:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 395:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 396:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 397:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       else
 398:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 399:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till HSE is disabled */
 403:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 406:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 408:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 409:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 411:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 412:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*----------------------------- HSI Configuration --------------------------*/
 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 415:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the parameters */
 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock *
 421:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
 422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL
 423:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 424:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* When HSI is used as system clock it will not disabled */
 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI
 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 427:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         return HAL_ERROR;
 428:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 429:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Otherwise, just the calibration is allowed */
 430:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       else
 431:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 432:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
 433:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 9


 434:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 435:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 436:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else
 437:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 438:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Check the HSI State */
 439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 440:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 441:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Enable the Internal High Speed oscillator (HSI). */
 442:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_HSI_ENABLE();
 443:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 444:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 445:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 446:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 447:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till HSI is ready */
 448:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 449:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 450:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 451:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 452:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 453:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 455:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 456:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
 457:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 458:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 459:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       else
 460:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Disable the Internal High Speed oscillator (HSI). */
 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_HSI_DISABLE();
 463:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 464:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 466:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 467:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till HSI is disabled */
 468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 469:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 470:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 471:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 472:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 473:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 474:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 475:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 476:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 477:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 478:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*------------------------------ LSI Configuration -------------------------*/
 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 480:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 481:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the parameters */
 482:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
 483:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 484:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSI State */
 485:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 486:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Enable the Internal Low Speed oscillator (LSI). */
 488:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       __HAL_RCC_LSI_ENABLE();
 489:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 490:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Get Start Tick */
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 10


 491:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 492:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 493:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Wait till LSI is ready */
 494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 495:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 497:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           return HAL_TIMEOUT;
 499:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 500:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 501:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /*  To have a fully stabilized clock in the specified range, a software delay of 1ms
 502:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           should be added.*/
 503:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       RCC_Delay(1);
 504:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 505:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else
 506:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 507:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Disable the Internal Low Speed oscillator (LSI). */
 508:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       __HAL_RCC_LSI_DISABLE();
 509:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 510:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Get Start Tick */
 511:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 512:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 513:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Wait till LSI is disabled */
 514:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 515:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 516:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 517:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 518:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           return HAL_TIMEOUT;
 519:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 520:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 521:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 522:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 523:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*------------------------------ LSE Configuration -------------------------*/
 524:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 525:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 526:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     FlagStatus       pwrclkchanged = RESET;
 527:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 528:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the parameters */
 529:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
 530:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 531:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Update LSE configuration in Backup Domain control register    */
 532:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Requires to enable write access to Backup Domain of necessary */
 533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (__HAL_RCC_PWR_IS_CLK_DISABLED())
 534:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 535:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       __HAL_RCC_PWR_CLK_ENABLE();
 536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       pwrclkchanged = SET;
 537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 538:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Enable write access to Backup domain */
 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       SET_BIT(PWR->CR, PWR_CR_DBP);
 543:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 544:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Wait for Backup domain Write protection disable */
 545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 11


 548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 550:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           return HAL_TIMEOUT;
 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 555:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 556:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Set the new LSE configuration -----------------------------------------*/
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 558:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
 560:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Get Start Tick */
 562:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 563:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 564:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Wait till LSE is ready */
 565:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 566:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 567:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 568:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 569:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           return HAL_TIMEOUT;
 570:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 571:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 572:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 573:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else
 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 575:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Get Start Tick */
 576:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 577:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 578:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Wait till LSE is disabled */
 579:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 580:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 581:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 582:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 583:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           return HAL_TIMEOUT;
 584:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 585:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 586:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 587:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 588:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Require to disable power clock if necessary */
 589:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (pwrclkchanged == SET)
 590:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 591:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       __HAL_RCC_PWR_CLK_DISABLE();
 592:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 593:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 594:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 595:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CR_PLL2ON)
 596:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*-------------------------------- PLL2 Configuration -----------------------*/
 597:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
 598:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_RCC_PLL2(RCC_OscInitStruct->PLL2.PLL2State));
 599:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC_OscInitStruct->PLL2.PLL2State) != RCC_PLL2_NONE)
 600:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 601:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* This bit can not be cleared if the PLL2 clock is used indirectly as system
 602:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       clock (i.e. it is used as PLL clock entry that is used as system clock). */
 603:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if ((__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) && \
 604:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && \
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 12


 605:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         ((READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) == RCC_CFGR2_PREDIV1SRC_PLL2))
 606:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 607:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       return HAL_ERROR;
 608:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 609:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else
 610:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 611:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((RCC_OscInitStruct->PLL2.PLL2State) == RCC_PLL2_ON)
 612:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 613:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Check the parameters */
 614:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         assert_param(IS_RCC_PLL2_MUL(RCC_OscInitStruct->PLL2.PLL2MUL));
 615:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         assert_param(IS_RCC_HSE_PREDIV2(RCC_OscInitStruct->PLL2.HSEPrediv2Value));
 616:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 617:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Prediv2 can be written only when the PLLI2S is disabled. */
 618:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Return an error only if new value is different from the programmed value */
 619:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON) && \
 620:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             (__HAL_RCC_HSE_GET_PREDIV2() != RCC_OscInitStruct->PLL2.HSEPrediv2Value))
 621:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 622:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           return HAL_ERROR;
 623:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 624:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 625:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Disable the main PLL2. */
 626:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL2_DISABLE();
 627:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 628:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 629:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 630:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 631:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till PLL2 is disabled */
 632:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != RESET)
 633:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 634:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 635:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 636:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 637:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 638:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 639:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 640:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Configure the HSE prediv2 factor --------------------------------*/
 641:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_HSE_PREDIV2_CONFIG(RCC_OscInitStruct->PLL2.HSEPrediv2Value);
 642:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 643:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Configure the main PLL2 multiplication factors. */
 644:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL2_CONFIG(RCC_OscInitStruct->PLL2.PLL2MUL);
 645:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 646:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Enable the main PLL2. */
 647:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL2_ENABLE();
 648:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 649:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 650:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 651:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 652:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till PLL2 is ready */
 653:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY)  == RESET)
 654:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 655:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 656:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 657:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 658:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 659:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 660:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 661:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       else
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 13


 662:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 663:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Set PREDIV1 source to HSE */
 664:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC);
 665:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 666:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Disable the main PLL2. */
 667:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL2_DISABLE();
 668:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 669:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 670:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 671:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 672:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till PLL2 is disabled */
 673:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY)  != RESET)
 674:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 675:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 676:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 677:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 678:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 679:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 680:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 681:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 682:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 683:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 684:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* RCC_CR_PLL2ON */
 685:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*-------------------------------- PLL Configuration -----------------------*/
 686:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
 687:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
 688:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 689:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 690:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check if the PLL is used as system clock or not */
 691:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 692:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 693:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 694:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 695:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Check the parameters */
 696:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
 697:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
 698:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 699:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Disable the main PLL. */
 700:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 701:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 702:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 703:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 704:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 705:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till PLL is disabled */
 706:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 707:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 708:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 709:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 710:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 711:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 712:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 713:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 714:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Configure the HSE prediv factor --------------------------------*/
 715:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* It can be written only when the PLL is disabled. Not used in PLL source is different tha
 716:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
 717:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 718:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           /* Check the parameter */
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 14


 719:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           assert_param(IS_RCC_HSE_PREDIV(RCC_OscInitStruct->HSEPredivValue));
 720:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1SRC)
 721:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           assert_param(IS_RCC_PREDIV1_SOURCE(RCC_OscInitStruct->Prediv1Source));
 722:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 723:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           /* Set PREDIV1 source */
 724:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
 725:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* RCC_CFGR2_PREDIV1SRC */
 726:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 727:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           /* Set PREDIV1 Value */
 728:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
 729:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 730:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 731:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Configure the main PLL clock source and multiplication factors. */
 732:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 733:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLMUL);
 734:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Enable the main PLL. */
 735:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL_ENABLE();
 736:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 737:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 738:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 739:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 740:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till PLL is ready */
 741:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 742:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 743:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 744:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 745:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 746:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 747:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 748:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 749:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       else
 750:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 751:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Disable the main PLL. */
 752:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 753:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 754:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Get Start Tick */
 755:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 756:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 757:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Wait till PLL is disabled */
 758:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 759:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 760:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 761:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 762:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             return HAL_TIMEOUT;
 763:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 764:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 765:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 766:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 767:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else
 768:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 769:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Check if there is a request to disable the PLL used as System clock source */
 770:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
 771:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 772:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         return HAL_ERROR;
 773:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 774:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       else
 775:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 15


 776:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* Do not return HAL_ERROR if request repeats the current configuration */
 777:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         pll_config = RCC->CFGR;
 778:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 779:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
 780:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 781:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           return HAL_ERROR;
 782:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 783:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 784:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 785:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 786:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 787:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return HAL_OK;
 788:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 789:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 790:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
 791:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Initializes the CPU, AHB and APB buses clocks according to the specified
 792:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         parameters in the RCC_ClkInitStruct.
 793:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
 794:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         contains the configuration information for the RCC peripheral.
 795:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  FLatency FLASH Latency
 796:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *          The value of this parameter depend on device used within the same series
 797:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
 798:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function
 799:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
 800:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The HSI is used (enabled by hardware) as system clock source after
 801:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         start-up from Reset, wake-up from STOP and STANDBY mode, or in case
 802:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         of failure of the HSE used directly or indirectly as system clock
 803:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         (if the Clock Security System CSS is enabled).
 804:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
 805:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   A switch from one clock source to another occurs only if the target
 806:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         clock source is ready (clock stable after start-up delay or PLL locked).
 807:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         If a clock source which is not yet ready is selected, the switch will
 808:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         occur when the clock source will be ready.
 809:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
 810:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         currently used as system clock source.
 811:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval HAL status
 812:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 813:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 814:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
 815:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
 816:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 817:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check Null pointer */
 818:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (RCC_ClkInitStruct == NULL)
 819:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 820:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     return HAL_ERROR;
 821:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 822:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 823:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
 824:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
 825:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_FLASH_LATENCY(FLatency));
 826:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 827:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
 828:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   must be correctly programmed according to the frequency of the CPU clock
 829:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     (HCLK) of the device. */
 830:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 831:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(FLASH_ACR_LATENCY)
 832:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Increasing the number of wait states because of higher CPU frequency */
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 16


 833:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (FLatency > __HAL_FLASH_GET_LATENCY())
 834:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 835:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 836:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
 837:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 838:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 839:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     memory by reading the FLASH_ACR register */
 840:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (__HAL_FLASH_GET_LATENCY() != FLatency)
 841:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 842:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     return HAL_ERROR;
 843:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 844:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 845:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 846:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* FLASH_ACR_LATENCY */
 847:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/
 848:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 849:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 850:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Set the highest APBx dividers in order to ensure that we do not go through
 851:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     a non-spec phase whatever we decrease or increase HCLK. */
 852:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 853:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 854:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 855:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 856:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 857:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 858:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 859:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 860:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 861:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 862:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Set the new HCLK clock divider */
 863:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
 864:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 865:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 866:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 867:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*------------------------- SYSCLK Configuration ---------------------------*/
 868:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 869:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 870:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
 871:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 872:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* HSE is selected as System Clock Source */
 873:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 874:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 875:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Check the HSE ready flag */
 876:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 877:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 878:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         return HAL_ERROR;
 879:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 880:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 881:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* PLL is selected as System Clock Source */
 882:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 883:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 884:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Check the PLL ready flag */
 885:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 886:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 887:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         return HAL_ERROR;
 888:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 889:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 17


 890:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* HSI is selected as System Clock Source */
 891:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     else
 892:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 893:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       /* Check the HSI ready flag */
 894:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 895:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 896:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         return HAL_ERROR;
 897:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 898:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 899:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 900:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 901:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Get Start Tick */
 902:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     tickstart = HAL_GetTick();
 903:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 904:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 905:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 906:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 907:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 908:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         return HAL_TIMEOUT;
 909:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 910:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 911:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 912:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 913:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(FLASH_ACR_LATENCY)
 914:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Decreasing the number of wait states because of lower CPU frequency */
 915:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (FLatency < __HAL_FLASH_GET_LATENCY())
 916:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 917:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 918:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
 919:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 920:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 921:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     memory by reading the FLASH_ACR register */
 922:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     if (__HAL_FLASH_GET_LATENCY() != FLatency)
 923:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 924:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     return HAL_ERROR;
 925:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 926:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 927:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* FLASH_ACR_LATENCY */
 928:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 929:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/
 930:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 931:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 932:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
 933:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 934:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 935:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 936:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /*-------------------------- PCLK2 Configuration ---------------------------*/
 937:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 938:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 939:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
 940:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
 941:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 942:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 943:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Update the SystemCoreClock global variable */
 944:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_C
 945:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 946:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Configure the source of time base considering new system clocks settings*/
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 18


 947:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   HAL_InitTick(uwTickPrio);
 948:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 949:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return HAL_OK;
 950:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 951:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 952:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
 953:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @}
 954:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 955:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 956:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
 957:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *  @brief   RCC clocks control functions
 958:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
 959:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @verbatim
 960:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ===============================================================================
 961:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****                   ##### Peripheral Control functions #####
 962:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   ===============================================================================
 963:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     [..]
 964:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     This subsection provides a set of functions allowing to control the RCC Clocks
 965:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     frequencies.
 966:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 967:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @endverbatim
 968:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @{
 969:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
 970:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 971:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
 972:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Selects the clock source to output on MCO pin.
 973:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   MCO pin should be configured in alternate function mode.
 974:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  RCC_MCOx specifies the output direction for the clock source.
 975:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 976:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
 977:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  RCC_MCOSource specifies the clock source to output.
 978:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 979:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_NOCLOCK     No clock selected as MCO clock
 980:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_SYSCLK      System clock selected as MCO clock
 981:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI         HSI selected as MCO clock
 982:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSE         HSE selected as MCO clock
 983:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @if STM32F105xC
 984:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK       PLL clock divided by 2 selected as MCO source
 985:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLL2CLK      PLL2 clock selected as MCO source
 986:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLL3CLK_DIV2 PLL3 clock divided by 2 selected as MCO source
 987:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_EXT_HSE      XT1 external 3-25 MHz oscillator clock selecte
 988:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLL3CLK      PLL3 clock selected as MCO source
 989:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @endif
 990:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @if STM32F107xC
 991:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK       PLL clock divided by 2 selected as MCO source
 992:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLL2CLK      PLL2 clock selected as MCO source
 993:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLL3CLK_DIV2 PLL3 clock divided by 2 selected as MCO source
 994:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_EXT_HSE XT1  external 3-25 MHz oscillator clock selected as
 995:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLL3CLK      PLL3 clock selected as MCO source
 996:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   @endif
 997:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  RCC_MCODiv specifies the MCO DIV.
 998:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 999:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_1 no division applied to MCO clock
1000:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval None
1001:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1002:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
1003:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 19


1004:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   GPIO_InitTypeDef gpio = {0U};
1005:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1006:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
1007:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_RCC_MCO(RCC_MCOx));
1008:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_RCC_MCODIV(RCC_MCODiv));
1009:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
1010:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1011:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Prevent unused argument(s) compilation warning */
1012:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   UNUSED(RCC_MCOx);
1013:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   UNUSED(RCC_MCODiv);
1014:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1015:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Configure the MCO1 pin in alternate function mode */
1016:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   gpio.Mode      = GPIO_MODE_AF_PP;
1017:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   gpio.Speed     = GPIO_SPEED_FREQ_HIGH;
1018:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   gpio.Pull      = GPIO_NOPULL;
1019:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   gpio.Pin       = MCO1_PIN;
1020:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1021:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* MCO1 Clock Enable */
1022:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   MCO1_CLK_ENABLE();
1023:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1024:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
1025:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1026:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Configure the MCO clock source */
1027:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv);
1028:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1029:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1030:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1031:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Enables the Clock Security System.
1032:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   If a failure is detected on the HSE oscillator clock, this oscillator
1033:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         is automatically disabled and an interrupt is generated to inform the
1034:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         software about the failure (Clock Security System Interrupt, CSSI),
1035:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         allowing the MCU to perform rescue operations. The CSSI is linked to
1036:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         the Cortex-M3 NMI (Non-Maskable Interrupt) exception vector.
1037:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval None
1038:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1039:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
1040:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1041:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
1042:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1043:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1044:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1045:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Disables the Clock Security System.
1046:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval None
1047:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1048:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void)
1049:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1050:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
1051:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1052:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1053:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1054:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Returns the SYSCLK frequency
1055:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The system frequency computed by this function is not the real
1056:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         frequency in the chip. It is calculated based on the predefined
1057:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         constant and the selected clock source:
1058:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
1059:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note     If SYSCLK source is HSE, function returns a value based on HSE_VALUE
1060:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *           divided by PREDIV factor(**)
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 20


1061:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note     If SYSCLK source is PLL, function returns a value based on HSE_VALUE
1062:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *           divided by PREDIV factor(**) or HSI_VALUE(*) multiplied by the PLL factor.
1063:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note     (*) HSI_VALUE is a constant defined in stm32f1xx_hal_conf.h file (default value
1064:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *               8 MHz) but the real value may vary depending on the variations
1065:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *               in voltage and temperature.
1066:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note     (**) HSE_VALUE is a constant defined in stm32f1xx_hal_conf.h file (default value
1067:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *                8 MHz), user has to ensure that HSE_VALUE is same as the real
1068:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *                frequency of the crystal used. Otherwise, this function may
1069:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *                have wrong result.
1070:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
1071:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The result of this function could be not correct when using fractional
1072:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         value for HSE crystal.
1073:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
1074:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   This function can be used by the user application to compute the
1075:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         baud-rate for the communication peripherals or configure other parameters.
1076:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
1077:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   Each time SYSCLK changes, this function must be called to update the
1078:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorre
1079:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
1080:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval SYSCLK frequency
1081:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1082:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void)
1083:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1084:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1SRC)
1085:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   const uint8_t aPLLMULFactorTable[14] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13};
1086:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
1087:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #else
1088:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   const uint8_t aPLLMULFactorTable[16] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16};
1089:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1)
1090:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   const uint8_t aPredivFactorTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16};
1091:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #else
1092:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   const uint8_t aPredivFactorTable[2] = {1, 2};
1093:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /*RCC_CFGR2_PREDIV1*/
1094:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1095:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif
1096:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
1097:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t sysclockfreq = 0U;
1098:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1SRC)
1099:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t prediv2 = 0U, pll2mul = 0U;
1100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /*RCC_CFGR2_PREDIV1SRC*/
1101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   tmpreg = RCC->CFGR;
1103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get SYSCLK source -------------------------------------------------------*/
1105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   switch (tmpreg & RCC_CFGR_SWS)
1106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
1108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
1109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       sysclockfreq = HSE_VALUE;
1110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       break;
1111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
1112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
1113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
1114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
1115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
1116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
1117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1)
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 21


1118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1
1119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #else
1120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_
1121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /*RCC_CFGR2_PREDIV1*/
1122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1SRC)
1123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC))
1125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
1126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           /* PLL2 selected as Prediv1 source */
1127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */
1128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1;
1129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2;
1130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           pllclk = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pll2mul * (uint64_t)pllmul) / ((uint
1131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
1132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         else
1133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
1134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
1135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
1136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
1137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using floa
1139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* In this case need to divide pllclk by 2 */
1140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos])
1141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
1142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           pllclk = pllclk / 2;
1143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
1144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #else
1145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
1146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         pllclk = (uint32_t)((HSE_VALUE  * pllmul) / prediv);
1147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /*RCC_CFGR2_PREDIV1SRC*/
1148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
1149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       else
1150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
1151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
1152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
1153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
1154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       sysclockfreq = pllclk;
1155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       break;
1156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
1157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
1158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     default: /* HSI used as system clock */
1159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
1160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       sysclockfreq = HSI_VALUE;
1161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       break;
1162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
1163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return sysclockfreq;
1165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Returns the HCLK frequency
1169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   Each time HCLK changes, this function must be called to update the
1170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         right HCLK value. Otherwise, any configuration based on this function will be incorrect
1171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *
1172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
1173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         and updated within this function
1174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval HCLK frequency
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 22


1175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
1177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return SystemCoreClock;
1179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Returns the PCLK1 frequency
1183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   Each time PCLK1 changes, this function must be called to update the
1184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
1185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval PCLK1 frequency
1186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
1188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
1190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos
1191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Returns the PCLK2 frequency
1195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note   Each time PCLK2 changes, this function must be called to update the
1196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrec
1197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval PCLK2 frequency
1198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void)
1200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
1202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos
1203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Configures the RCC_OscInitStruct according to the internal
1207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * RCC configuration registers.
1208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
1209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * will be configured.
1210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval None
1211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
1213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
1215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(RCC_OscInitStruct != NULL);
1216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Set all possible values for the Oscillator type parameter ---------------*/
1218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI  \
1219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****                                       | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
1220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1SRC)
1222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the Prediv1 source --------------------------------------------------*/
1223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->Prediv1Source = READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC);
1224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* RCC_CFGR2_PREDIV1SRC */
1225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the HSE configuration -----------------------------------------------*/
1227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC->CR & RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
1228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
1230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else if ((RCC->CR & RCC_CR_HSEON) == RCC_CR_HSEON)
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 23


1232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_ON;
1234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else
1236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
1238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->HSEPredivValue = __HAL_RCC_HSE_GET_PREDIV();
1240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the HSI configuration -----------------------------------------------*/
1242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC->CR & RCC_CR_HSION) == RCC_CR_HSION)
1243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_ON;
1245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else
1247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
1249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_
1252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the LSE configuration -----------------------------------------------*/
1254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC->BDCR & RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
1255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
1257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else if ((RCC->BDCR & RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
1259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_ON;
1261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else
1263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
1265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the LSI configuration -----------------------------------------------*/
1268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC->CSR & RCC_CSR_LSION) == RCC_CSR_LSION)
1269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_ON;
1271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else
1273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
1275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the PLL configuration -----------------------------------------------*/
1279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC->CR & RCC_CR_PLLON) == RCC_CR_PLLON)
1280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
1282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else
1284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
1286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
1288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMULL);
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 24


1289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CR_PLL2ON)
1290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the PLL2 configuration -----------------------------------------------*/
1291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if ((RCC->CR & RCC_CR_PLL2ON) == RCC_CR_PLL2ON)
1292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->PLL2.PLL2State = RCC_PLL2_ON;
1294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   else
1296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     RCC_OscInitStruct->PLL2.PLL2State = RCC_PLL2_OFF;
1298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->PLL2.HSEPrediv2Value = __HAL_RCC_HSE_GET_PREDIV2();
1300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->PLL2.PLL2MUL = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PLL2MUL);
1301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /* RCC_CR_PLL2ON */
1302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  Get the RCC_ClkInitStruct according to the internal
1306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * RCC configuration registers.
1307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that
1308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * contains the current clock configuration.
1309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  pFLatency Pointer on the Flash Latency.
1310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval None
1311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
1313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
1315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(RCC_ClkInitStruct != NULL);
1316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   assert_param(pFLatency != NULL);
1317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Set all possible values for the Clock type parameter --------------------*/
1319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 
1320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the SYSCLK configuration --------------------------------------------*/
1322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
1323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the HCLK configuration ----------------------------------------------*/
1325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
1326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the APB1 configuration ----------------------------------------------*/
1328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
1329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the APB2 configuration ----------------------------------------------*/
1331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
1332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if   defined(FLASH_ACR_LATENCY)
1334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get the Flash Wait State (Latency) configuration ------------------------*/
1335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
1336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #else
1337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* For VALUE lines devices, only LATENCY_0 can be set*/
1338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *pFLatency = (uint32_t)FLASH_LATENCY_0;
1339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif
1340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief This function handles the RCC CSS interrupt request.
1344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @note This API should be called under the NMI_Handler().
1345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval None
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 25


1346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
1349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check RCC CSSF flag  */
1350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   if (__HAL_RCC_GET_IT(RCC_IT_CSS))
1351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* RCC Clock Security System interrupt user callback */
1353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     HAL_RCC_CSSCallback();
1354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Clear RCC CSS pending bit */
1356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
1357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
1359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  This function provides delay (in milliseconds) based on CPU cycles method.
1362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @param  mdelay: specifies the delay time length, in milliseconds.
1363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval None
1364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** static void RCC_Delay(uint32_t mdelay)
1366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
  25              		.loc 1 1366 0
  26              		.cfi_startproc
  27              		@ args = 0, pretend = 0, frame = 8
  28              		@ frame_needed = 0, uses_anonymous_args = 0
  29              		@ link register save eliminated.
  30              	.LVL0:
  31 0000 82B0     		sub	sp, sp, #8
  32              	.LCFI0:
  33              		.cfi_def_cfa_offset 8
1367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
  34              		.loc 1 1367 0
  35 0002 084B     		ldr	r3, .L4
  36 0004 1B68     		ldr	r3, [r3]
  37 0006 084A     		ldr	r2, .L4+4
  38 0008 A2FB0323 		umull	r2, r3, r2, r3
  39 000c 5B0A     		lsrs	r3, r3, #9
  40 000e 00FB03F0 		mul	r0, r0, r3
  41              	.LVL1:
  42 0012 0190     		str	r0, [sp, #4]
  43              	.L2:
1368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   do
1369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
1370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     __NOP();
  44              		.loc 1 1370 0 discriminator 1
  45              		.syntax unified
  46              	@ 1370 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c" 1
  47 0014 00BF     		nop
  48              	@ 0 "" 2
1371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
1372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   while (Delay --);
  49              		.loc 1 1372 0 discriminator 1
  50              		.thumb
  51              		.syntax unified
  52 0016 019B     		ldr	r3, [sp, #4]
  53 0018 5A1E     		subs	r2, r3, #1
  54 001a 0192     		str	r2, [sp, #4]
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 26


  55 001c 002B     		cmp	r3, #0
  56 001e F9D1     		bne	.L2
1373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
  57              		.loc 1 1373 0
  58 0020 02B0     		add	sp, sp, #8
  59              	.LCFI1:
  60              		.cfi_def_cfa_offset 0
  61              		@ sp needed
  62 0022 7047     		bx	lr
  63              	.L5:
  64              		.align	2
  65              	.L4:
  66 0024 00000000 		.word	SystemCoreClock
  67 0028 D34D6210 		.word	274877907
  68              		.cfi_endproc
  69              	.LFE78:
  71              		.section	.text.HAL_RCC_DeInit,"ax",%progbits
  72              		.align	1
  73              		.global	HAL_RCC_DeInit
  74              		.syntax unified
  75              		.thumb
  76              		.thumb_func
  77              		.fpu softvfp
  79              	HAL_RCC_DeInit:
  80              	.LFB65:
 203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
  81              		.loc 1 203 0
  82              		.cfi_startproc
  83              		@ args = 0, pretend = 0, frame = 0
  84              		@ frame_needed = 0, uses_anonymous_args = 0
  85 0000 70B5     		push	{r4, r5, r6, lr}
  86              	.LCFI2:
  87              		.cfi_def_cfa_offset 16
  88              		.cfi_offset 4, -16
  89              		.cfi_offset 5, -12
  90              		.cfi_offset 6, -8
  91              		.cfi_offset 14, -4
 207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  92              		.loc 1 207 0
  93 0002 FFF7FEFF 		bl	HAL_GetTick
  94              	.LVL2:
  95 0006 0446     		mov	r4, r0
  96              	.LVL3:
 210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
  97              		.loc 1 210 0
  98 0008 364A     		ldr	r2, .L27
  99 000a 1368     		ldr	r3, [r2]
 100 000c 43F00103 		orr	r3, r3, #1
 101 0010 1360     		str	r3, [r2]
 102              	.LVL4:
 103              	.L7:
 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 104              		.loc 1 213 0
 105 0012 344B     		ldr	r3, .L27
 106 0014 1B68     		ldr	r3, [r3]
 107 0016 13F0020F 		tst	r3, #2
 108 001a 07D1     		bne	.L22
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 27


 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 109              		.loc 1 215 0
 110 001c FFF7FEFF 		bl	HAL_GetTick
 111              	.LVL5:
 112 0020 001B     		subs	r0, r0, r4
 113 0022 0228     		cmp	r0, #2
 114 0024 F5D9     		bls	.L7
 217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 115              		.loc 1 217 0
 116 0026 0324     		movs	r4, #3
 117              	.LVL6:
 118              	.L8:
 330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 119              		.loc 1 330 0
 120 0028 2046     		mov	r0, r4
 121 002a 70BD     		pop	{r4, r5, r6, pc}
 122              	.LVL7:
 123              	.L22:
 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 124              		.loc 1 222 0
 125 002c 2D4D     		ldr	r5, .L27
 126 002e 2B68     		ldr	r3, [r5]
 127 0030 23F0F803 		bic	r3, r3, #248
 128 0034 43F08003 		orr	r3, r3, #128
 129 0038 2B60     		str	r3, [r5]
 225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 130              		.loc 1 225 0
 131 003a FFF7FEFF 		bl	HAL_GetTick
 132              	.LVL8:
 133 003e 0446     		mov	r4, r0
 134              	.LVL9:
 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 135              		.loc 1 228 0
 136 0040 0023     		movs	r3, #0
 137 0042 6B60     		str	r3, [r5, #4]
 138              	.LVL10:
 139              	.L10:
 231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 140              		.loc 1 231 0
 141 0044 274B     		ldr	r3, .L27
 142 0046 5B68     		ldr	r3, [r3, #4]
 143 0048 13F00C0F 		tst	r3, #12
 144 004c 08D0     		beq	.L23
 233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 145              		.loc 1 233 0
 146 004e FFF7FEFF 		bl	HAL_GetTick
 147              	.LVL11:
 148 0052 001B     		subs	r0, r0, r4
 149 0054 41F28833 		movw	r3, #5000
 150 0058 9842     		cmp	r0, r3
 151 005a F3D9     		bls	.L10
 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 152              		.loc 1 235 0
 153 005c 0324     		movs	r4, #3
 154              	.LVL12:
 155 005e E3E7     		b	.L8
 156              	.LVL13:
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 28


 157              	.L23:
 240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 158              		.loc 1 240 0
 159 0060 214A     		ldr	r2, .L27+4
 160 0062 224B     		ldr	r3, .L27+8
 161 0064 1A60     		str	r2, [r3]
 243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 162              		.loc 1 243 0
 163 0066 224B     		ldr	r3, .L27+12
 164 0068 1868     		ldr	r0, [r3]
 165 006a FFF7FEFF 		bl	HAL_InitTick
 166              	.LVL14:
 167 006e 0446     		mov	r4, r0
 168              	.LVL15:
 169 0070 08B1     		cbz	r0, .L24
 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 170              		.loc 1 245 0
 171 0072 0124     		movs	r4, #1
 172 0074 D8E7     		b	.L8
 173              	.L24:
 249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 174              		.loc 1 249 0
 175 0076 FFF7FEFF 		bl	HAL_GetTick
 176              	.LVL16:
 177 007a 0546     		mov	r5, r0
 178              	.LVL17:
 252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 179              		.loc 1 252 0
 180 007c 194A     		ldr	r2, .L27
 181 007e 1368     		ldr	r3, [r2]
 182 0080 23F08073 		bic	r3, r3, #16777216
 183 0084 1360     		str	r3, [r2]
 184              	.LVL18:
 185              	.L12:
 255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 186              		.loc 1 255 0
 187 0086 174B     		ldr	r3, .L27
 188 0088 1B68     		ldr	r3, [r3]
 189 008a 13F0007F 		tst	r3, #33554432
 190 008e 06D0     		beq	.L25
 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 191              		.loc 1 257 0
 192 0090 FFF7FEFF 		bl	HAL_GetTick
 193              	.LVL19:
 194 0094 401B     		subs	r0, r0, r5
 195 0096 0228     		cmp	r0, #2
 196 0098 F5D9     		bls	.L12
 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 197              		.loc 1 259 0
 198 009a 0324     		movs	r4, #3
 199 009c C4E7     		b	.L8
 200              	.L25:
 264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 201              		.loc 1 264 0
 202 009e 114E     		ldr	r6, .L27
 203 00a0 0023     		movs	r3, #0
 204 00a2 7360     		str	r3, [r6, #4]
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 29


 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 205              		.loc 1 267 0
 206 00a4 FFF7FEFF 		bl	HAL_GetTick
 207              	.LVL20:
 208 00a8 0546     		mov	r5, r0
 209              	.LVL21:
 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 210              		.loc 1 270 0
 211 00aa 3368     		ldr	r3, [r6]
 212 00ac 23F41023 		bic	r3, r3, #589824
 213 00b0 3360     		str	r3, [r6]
 214              	.LVL22:
 215              	.L14:
 273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 216              		.loc 1 273 0
 217 00b2 0C4B     		ldr	r3, .L27
 218 00b4 1B68     		ldr	r3, [r3]
 219 00b6 13F4003F 		tst	r3, #131072
 220 00ba 06D0     		beq	.L26
 275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 221              		.loc 1 275 0
 222 00bc FFF7FEFF 		bl	HAL_GetTick
 223              	.LVL23:
 224 00c0 401B     		subs	r0, r0, r5
 225 00c2 6428     		cmp	r0, #100
 226 00c4 F5D9     		bls	.L14
 277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 227              		.loc 1 277 0
 228 00c6 0324     		movs	r4, #3
 229 00c8 AEE7     		b	.L8
 230              	.L26:
 282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 231              		.loc 1 282 0
 232 00ca 064B     		ldr	r3, .L27
 233 00cc 1A68     		ldr	r2, [r3]
 234 00ce 22F48022 		bic	r2, r2, #262144
 235 00d2 1A60     		str	r2, [r3]
 324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 236              		.loc 1 324 0
 237 00d4 5A6A     		ldr	r2, [r3, #36]
 238 00d6 42F08072 		orr	r2, r2, #16777216
 239 00da 5A62     		str	r2, [r3, #36]
 327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 240              		.loc 1 327 0
 241 00dc 0022     		movs	r2, #0
 242 00de 9A60     		str	r2, [r3, #8]
 329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 243              		.loc 1 329 0
 244 00e0 A2E7     		b	.L8
 245              	.L28:
 246 00e2 00BF     		.align	2
 247              	.L27:
 248 00e4 00100240 		.word	1073876992
 249 00e8 00127A00 		.word	8000000
 250 00ec 00000000 		.word	SystemCoreClock
 251 00f0 00000000 		.word	uwTickPrio
 252              		.cfi_endproc
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 30


 253              	.LFE65:
 255              		.section	.text.HAL_RCC_OscConfig,"ax",%progbits
 256              		.align	1
 257              		.global	HAL_RCC_OscConfig
 258              		.syntax unified
 259              		.thumb
 260              		.thumb_func
 261              		.fpu softvfp
 263              	HAL_RCC_OscConfig:
 264              	.LFB66:
 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
 265              		.loc 1 348 0
 266              		.cfi_startproc
 267              		@ args = 0, pretend = 0, frame = 8
 268              		@ frame_needed = 0, uses_anonymous_args = 0
 269              	.LVL24:
 353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 270              		.loc 1 353 0
 271 0000 0028     		cmp	r0, #0
 272 0002 00F0F581 		beq	.L82
 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
 273              		.loc 1 348 0
 274 0006 70B5     		push	{r4, r5, r6, lr}
 275              	.LCFI3:
 276              		.cfi_def_cfa_offset 16
 277              		.cfi_offset 4, -16
 278              		.cfi_offset 5, -12
 279              		.cfi_offset 6, -8
 280              		.cfi_offset 14, -4
 281 0008 82B0     		sub	sp, sp, #8
 282              	.LCFI4:
 283              		.cfi_def_cfa_offset 24
 284 000a 0446     		mov	r4, r0
 362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 285              		.loc 1 362 0
 286 000c 0368     		ldr	r3, [r0]
 287 000e 13F0010F 		tst	r3, #1
 288 0012 3DD0     		beq	.L31
 368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL
 289              		.loc 1 368 0
 290 0014 AB4B     		ldr	r3, .L123
 291 0016 5B68     		ldr	r3, [r3, #4]
 292 0018 03F00C03 		and	r3, r3, #12
 293 001c 042B     		cmp	r3, #4
 294 001e 2ED0     		beq	.L32
 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 295              		.loc 1 369 0
 296 0020 A84B     		ldr	r3, .L123
 297 0022 5B68     		ldr	r3, [r3, #4]
 298 0024 03F00C03 		and	r3, r3, #12
 299 0028 082B     		cmp	r3, #8
 300 002a 23D0     		beq	.L106
 301              	.L33:
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 302              		.loc 1 379 0
 303 002c 6368     		ldr	r3, [r4, #4]
 304 002e B3F5803F 		cmp	r3, #65536
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 31


 305 0032 51D0     		beq	.L107
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 306              		.loc 1 379 0 is_stmt 0 discriminator 2
 307 0034 002B     		cmp	r3, #0
 308 0036 55D1     		bne	.L36
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 309              		.loc 1 379 0 discriminator 3
 310 0038 03F18043 		add	r3, r3, #1073741824
 311 003c 03F50433 		add	r3, r3, #135168
 312 0040 1A68     		ldr	r2, [r3]
 313 0042 22F48032 		bic	r2, r2, #65536
 314 0046 1A60     		str	r2, [r3]
 315 0048 1A68     		ldr	r2, [r3]
 316 004a 22F48022 		bic	r2, r2, #262144
 317 004e 1A60     		str	r2, [r3]
 318              	.L35:
 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 319              		.loc 1 383 0 is_stmt 1
 320 0050 6368     		ldr	r3, [r4, #4]
 321 0052 002B     		cmp	r3, #0
 322 0054 60D0     		beq	.L38
 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 323              		.loc 1 386 0
 324 0056 FFF7FEFF 		bl	HAL_GetTick
 325              	.LVL25:
 326 005a 0546     		mov	r5, r0
 327              	.LVL26:
 328              	.L39:
 389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 329              		.loc 1 389 0
 330 005c 994B     		ldr	r3, .L123
 331 005e 1B68     		ldr	r3, [r3]
 332 0060 13F4003F 		tst	r3, #131072
 333 0064 14D1     		bne	.L31
 391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 334              		.loc 1 391 0
 335 0066 FFF7FEFF 		bl	HAL_GetTick
 336              	.LVL27:
 337 006a 401B     		subs	r0, r0, r5
 338 006c 6428     		cmp	r0, #100
 339 006e F5D9     		bls	.L39
 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 340              		.loc 1 393 0
 341 0070 0320     		movs	r0, #3
 342 0072 C2E1     		b	.L30
 343              	.LVL28:
 344              	.L106:
 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 345              		.loc 1 369 0 discriminator 1
 346 0074 934B     		ldr	r3, .L123
 347 0076 5B68     		ldr	r3, [r3, #4]
 348 0078 13F4803F 		tst	r3, #65536
 349 007c D6D0     		beq	.L33
 350              	.L32:
 371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 351              		.loc 1 371 0
 352 007e 914B     		ldr	r3, .L123
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 32


 353 0080 1B68     		ldr	r3, [r3]
 354 0082 13F4003F 		tst	r3, #131072
 355 0086 03D0     		beq	.L31
 371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 356              		.loc 1 371 0 is_stmt 0 discriminator 1
 357 0088 6368     		ldr	r3, [r4, #4]
 358 008a 002B     		cmp	r3, #0
 359 008c 00F0B281 		beq	.L108
 360              	.LVL29:
 361              	.L31:
 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 362              		.loc 1 414 0 is_stmt 1
 363 0090 2368     		ldr	r3, [r4]
 364 0092 13F0020F 		tst	r3, #2
 365 0096 65D0     		beq	.L43
 421:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL
 366              		.loc 1 421 0
 367 0098 8A4B     		ldr	r3, .L123
 368 009a 5B68     		ldr	r3, [r3, #4]
 369 009c 13F00C0F 		tst	r3, #12
 370 00a0 4ED0     		beq	.L44
 422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 371              		.loc 1 422 0
 372 00a2 884B     		ldr	r3, .L123
 373 00a4 5B68     		ldr	r3, [r3, #4]
 374 00a6 03F00C03 		and	r3, r3, #12
 375 00aa 082B     		cmp	r3, #8
 376 00ac 43D0     		beq	.L109
 377              	.L45:
 439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 378              		.loc 1 439 0
 379 00ae 2369     		ldr	r3, [r4, #16]
 380 00b0 002B     		cmp	r3, #0
 381 00b2 79D0     		beq	.L47
 442:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 382              		.loc 1 442 0
 383 00b4 0122     		movs	r2, #1
 384 00b6 844B     		ldr	r3, .L123+4
 385 00b8 1A60     		str	r2, [r3]
 445:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 386              		.loc 1 445 0
 387 00ba FFF7FEFF 		bl	HAL_GetTick
 388              	.LVL30:
 389 00be 0546     		mov	r5, r0
 390              	.LVL31:
 391              	.L48:
 448:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 392              		.loc 1 448 0
 393 00c0 804B     		ldr	r3, .L123
 394 00c2 1B68     		ldr	r3, [r3]
 395 00c4 13F0020F 		tst	r3, #2
 396 00c8 65D1     		bne	.L110
 450:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 397              		.loc 1 450 0
 398 00ca FFF7FEFF 		bl	HAL_GetTick
 399              	.LVL32:
 400 00ce 401B     		subs	r0, r0, r5
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 33


 401 00d0 0228     		cmp	r0, #2
 402 00d2 F5D9     		bls	.L48
 452:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 403              		.loc 1 452 0
 404 00d4 0320     		movs	r0, #3
 405 00d6 90E1     		b	.L30
 406              	.LVL33:
 407              	.L107:
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 408              		.loc 1 379 0 discriminator 1
 409 00d8 7A4A     		ldr	r2, .L123
 410 00da 1368     		ldr	r3, [r2]
 411 00dc 43F48033 		orr	r3, r3, #65536
 412 00e0 1360     		str	r3, [r2]
 413 00e2 B5E7     		b	.L35
 414              	.L36:
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 415              		.loc 1 379 0 is_stmt 0 discriminator 4
 416 00e4 B3F5A02F 		cmp	r3, #327680
 417 00e8 09D0     		beq	.L111
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 418              		.loc 1 379 0 discriminator 6
 419 00ea 764B     		ldr	r3, .L123
 420 00ec 1A68     		ldr	r2, [r3]
 421 00ee 22F48032 		bic	r2, r2, #65536
 422 00f2 1A60     		str	r2, [r3]
 423 00f4 1A68     		ldr	r2, [r3]
 424 00f6 22F48022 		bic	r2, r2, #262144
 425 00fa 1A60     		str	r2, [r3]
 426 00fc A8E7     		b	.L35
 427              	.L111:
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 428              		.loc 1 379 0 discriminator 5
 429 00fe 03F18043 		add	r3, r3, #1073741824
 430 0102 A3F53C33 		sub	r3, r3, #192512
 431 0106 1A68     		ldr	r2, [r3]
 432 0108 42F48022 		orr	r2, r2, #262144
 433 010c 1A60     		str	r2, [r3]
 434 010e 1A68     		ldr	r2, [r3]
 435 0110 42F48032 		orr	r2, r2, #65536
 436 0114 1A60     		str	r2, [r3]
 437 0116 9BE7     		b	.L35
 438              	.L38:
 400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 439              		.loc 1 400 0 is_stmt 1
 440 0118 FFF7FEFF 		bl	HAL_GetTick
 441              	.LVL34:
 442 011c 0546     		mov	r5, r0
 443              	.LVL35:
 444              	.L41:
 403:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 445              		.loc 1 403 0
 446 011e 694B     		ldr	r3, .L123
 447 0120 1B68     		ldr	r3, [r3]
 448 0122 13F4003F 		tst	r3, #131072
 449 0126 B3D0     		beq	.L31
 405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 34


 450              		.loc 1 405 0
 451 0128 FFF7FEFF 		bl	HAL_GetTick
 452              	.LVL36:
 453 012c 401B     		subs	r0, r0, r5
 454 012e 6428     		cmp	r0, #100
 455 0130 F5D9     		bls	.L41
 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 456              		.loc 1 407 0
 457 0132 0320     		movs	r0, #3
 458 0134 61E1     		b	.L30
 459              	.LVL37:
 460              	.L109:
 422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 461              		.loc 1 422 0 discriminator 1
 462 0136 634B     		ldr	r3, .L123
 463 0138 5B68     		ldr	r3, [r3, #4]
 464 013a 13F4803F 		tst	r3, #65536
 465 013e B6D1     		bne	.L45
 466              	.L44:
 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 467              		.loc 1 425 0
 468 0140 604B     		ldr	r3, .L123
 469 0142 1B68     		ldr	r3, [r3]
 470 0144 13F0020F 		tst	r3, #2
 471 0148 04D0     		beq	.L46
 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 472              		.loc 1 425 0 is_stmt 0 discriminator 1
 473 014a 2369     		ldr	r3, [r4, #16]
 474 014c 012B     		cmp	r3, #1
 475 014e 01D0     		beq	.L46
 427:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 476              		.loc 1 427 0 is_stmt 1
 477 0150 0120     		movs	r0, #1
 478 0152 52E1     		b	.L30
 479              	.L46:
 433:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 480              		.loc 1 433 0
 481 0154 5B4A     		ldr	r2, .L123
 482 0156 1368     		ldr	r3, [r2]
 483 0158 23F0F803 		bic	r3, r3, #248
 484 015c 6169     		ldr	r1, [r4, #20]
 485 015e 43EAC103 		orr	r3, r3, r1, lsl #3
 486 0162 1360     		str	r3, [r2]
 487              	.L43:
 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 488              		.loc 1 479 0
 489 0164 2368     		ldr	r3, [r4]
 490 0166 13F0080F 		tst	r3, #8
 491 016a 32D0     		beq	.L52
 485:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 492              		.loc 1 485 0
 493 016c A369     		ldr	r3, [r4, #24]
 494 016e 002B     		cmp	r3, #0
 495 0170 6ED0     		beq	.L53
 488:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 496              		.loc 1 488 0
 497 0172 0122     		movs	r2, #1
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 35


 498 0174 554B     		ldr	r3, .L123+8
 499 0176 1A60     		str	r2, [r3]
 491:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 500              		.loc 1 491 0
 501 0178 FFF7FEFF 		bl	HAL_GetTick
 502              	.LVL38:
 503 017c 0546     		mov	r5, r0
 504              	.LVL39:
 505              	.L54:
 494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 506              		.loc 1 494 0
 507 017e 514B     		ldr	r3, .L123
 508 0180 5B6A     		ldr	r3, [r3, #36]
 509 0182 13F0020F 		tst	r3, #2
 510 0186 21D1     		bne	.L112
 496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 511              		.loc 1 496 0
 512 0188 FFF7FEFF 		bl	HAL_GetTick
 513              	.LVL40:
 514 018c 401B     		subs	r0, r0, r5
 515 018e 0228     		cmp	r0, #2
 516 0190 F5D9     		bls	.L54
 498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 517              		.loc 1 498 0
 518 0192 0320     		movs	r0, #3
 519 0194 31E1     		b	.L30
 520              	.L110:
 457:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 521              		.loc 1 457 0
 522 0196 4B4A     		ldr	r2, .L123
 523 0198 1368     		ldr	r3, [r2]
 524 019a 23F0F803 		bic	r3, r3, #248
 525 019e 6169     		ldr	r1, [r4, #20]
 526 01a0 43EAC103 		orr	r3, r3, r1, lsl #3
 527 01a4 1360     		str	r3, [r2]
 528 01a6 DDE7     		b	.L43
 529              	.LVL41:
 530              	.L47:
 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 531              		.loc 1 462 0
 532 01a8 0022     		movs	r2, #0
 533 01aa 474B     		ldr	r3, .L123+4
 534 01ac 1A60     		str	r2, [r3]
 465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 535              		.loc 1 465 0
 536 01ae FFF7FEFF 		bl	HAL_GetTick
 537              	.LVL42:
 538 01b2 0546     		mov	r5, r0
 539              	.LVL43:
 540              	.L50:
 468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 541              		.loc 1 468 0
 542 01b4 434B     		ldr	r3, .L123
 543 01b6 1B68     		ldr	r3, [r3]
 544 01b8 13F0020F 		tst	r3, #2
 545 01bc D2D0     		beq	.L43
 470:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 36


 546              		.loc 1 470 0
 547 01be FFF7FEFF 		bl	HAL_GetTick
 548              	.LVL44:
 549 01c2 401B     		subs	r0, r0, r5
 550 01c4 0228     		cmp	r0, #2
 551 01c6 F5D9     		bls	.L50
 472:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 552              		.loc 1 472 0
 553 01c8 0320     		movs	r0, #3
 554 01ca 16E1     		b	.L30
 555              	.L112:
 503:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 556              		.loc 1 503 0
 557 01cc 0120     		movs	r0, #1
 558 01ce FFF7FEFF 		bl	RCC_Delay
 559              	.LVL45:
 560              	.L52:
 524:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 561              		.loc 1 524 0
 562 01d2 2368     		ldr	r3, [r4]
 563 01d4 13F0040F 		tst	r3, #4
 564 01d8 00F09880 		beq	.L58
 565              	.LVL46:
 566              	.LBB2:
 533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 567              		.loc 1 533 0
 568 01dc 394B     		ldr	r3, .L123
 569 01de DB69     		ldr	r3, [r3, #28]
 570 01e0 13F0805F 		tst	r3, #268435456
 571 01e4 46D1     		bne	.L91
 572              	.LBB3:
 535:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       pwrclkchanged = SET;
 573              		.loc 1 535 0
 574 01e6 374B     		ldr	r3, .L123
 575 01e8 DA69     		ldr	r2, [r3, #28]
 576 01ea 42F08052 		orr	r2, r2, #268435456
 577 01ee DA61     		str	r2, [r3, #28]
 578 01f0 DB69     		ldr	r3, [r3, #28]
 579 01f2 03F08053 		and	r3, r3, #268435456
 580 01f6 0193     		str	r3, [sp, #4]
 581 01f8 019B     		ldr	r3, [sp, #4]
 582              	.LVL47:
 583              	.LBE3:
 536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 584              		.loc 1 536 0
 585 01fa 0125     		movs	r5, #1
 586              	.LVL48:
 587              	.L59:
 539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 588              		.loc 1 539 0
 589 01fc 344B     		ldr	r3, .L123+12
 590 01fe 1B68     		ldr	r3, [r3]
 591 0200 13F4807F 		tst	r3, #256
 592 0204 38D0     		beq	.L113
 593              	.L60:
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 594              		.loc 1 557 0
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 37


 595 0206 E368     		ldr	r3, [r4, #12]
 596 0208 012B     		cmp	r3, #1
 597 020a 49D0     		beq	.L114
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 598              		.loc 1 557 0 is_stmt 0 discriminator 2
 599 020c 002B     		cmp	r3, #0
 600 020e 4DD1     		bne	.L65
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 601              		.loc 1 557 0 discriminator 3
 602 0210 03F18043 		add	r3, r3, #1073741824
 603 0214 03F50433 		add	r3, r3, #135168
 604 0218 1A6A     		ldr	r2, [r3, #32]
 605 021a 22F00102 		bic	r2, r2, #1
 606 021e 1A62     		str	r2, [r3, #32]
 607 0220 1A6A     		ldr	r2, [r3, #32]
 608 0222 22F00402 		bic	r2, r2, #4
 609 0226 1A62     		str	r2, [r3, #32]
 610              	.L64:
 559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 611              		.loc 1 559 0 is_stmt 1
 612 0228 E368     		ldr	r3, [r4, #12]
 613 022a 002B     		cmp	r3, #0
 614 022c 5CD0     		beq	.L67
 562:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 615              		.loc 1 562 0
 616 022e FFF7FEFF 		bl	HAL_GetTick
 617              	.LVL49:
 618 0232 0646     		mov	r6, r0
 619              	.LVL50:
 620              	.L68:
 565:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 621              		.loc 1 565 0
 622 0234 234B     		ldr	r3, .L123
 623 0236 1B6A     		ldr	r3, [r3, #32]
 624 0238 13F0020F 		tst	r3, #2
 625 023c 65D1     		bne	.L70
 567:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 626              		.loc 1 567 0
 627 023e FFF7FEFF 		bl	HAL_GetTick
 628              	.LVL51:
 629 0242 801B     		subs	r0, r0, r6
 630 0244 41F28833 		movw	r3, #5000
 631 0248 9842     		cmp	r0, r3
 632 024a F3D9     		bls	.L68
 569:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 633              		.loc 1 569 0
 634 024c 0320     		movs	r0, #3
 635 024e D4E0     		b	.L30
 636              	.LVL52:
 637              	.L53:
 638              	.LBE2:
 508:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 639              		.loc 1 508 0
 640 0250 0022     		movs	r2, #0
 641 0252 1E4B     		ldr	r3, .L123+8
 642 0254 1A60     		str	r2, [r3]
 511:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 38


 643              		.loc 1 511 0
 644 0256 FFF7FEFF 		bl	HAL_GetTick
 645              	.LVL53:
 646 025a 0546     		mov	r5, r0
 647              	.LVL54:
 648              	.L56:
 514:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 649              		.loc 1 514 0
 650 025c 194B     		ldr	r3, .L123
 651 025e 5B6A     		ldr	r3, [r3, #36]
 652 0260 13F0020F 		tst	r3, #2
 653 0264 B5D0     		beq	.L52
 516:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 654              		.loc 1 516 0
 655 0266 FFF7FEFF 		bl	HAL_GetTick
 656              	.LVL55:
 657 026a 401B     		subs	r0, r0, r5
 658 026c 0228     		cmp	r0, #2
 659 026e F5D9     		bls	.L56
 518:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 660              		.loc 1 518 0
 661 0270 0320     		movs	r0, #3
 662 0272 C2E0     		b	.L30
 663              	.LVL56:
 664              	.L91:
 665              	.LBB4:
 526:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 666              		.loc 1 526 0
 667 0274 0025     		movs	r5, #0
 668 0276 C1E7     		b	.L59
 669              	.LVL57:
 670              	.L113:
 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 671              		.loc 1 542 0
 672 0278 154A     		ldr	r2, .L123+12
 673 027a 1368     		ldr	r3, [r2]
 674 027c 43F48073 		orr	r3, r3, #256
 675 0280 1360     		str	r3, [r2]
 545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 676              		.loc 1 545 0
 677 0282 FFF7FEFF 		bl	HAL_GetTick
 678              	.LVL58:
 679 0286 0646     		mov	r6, r0
 680              	.LVL59:
 681              	.L61:
 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 682              		.loc 1 547 0
 683 0288 114B     		ldr	r3, .L123+12
 684 028a 1B68     		ldr	r3, [r3]
 685 028c 13F4807F 		tst	r3, #256
 686 0290 B9D1     		bne	.L60
 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 687              		.loc 1 549 0
 688 0292 FFF7FEFF 		bl	HAL_GetTick
 689              	.LVL60:
 690 0296 801B     		subs	r0, r0, r6
 691 0298 6428     		cmp	r0, #100
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 39


 692 029a F5D9     		bls	.L61
 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 693              		.loc 1 551 0
 694 029c 0320     		movs	r0, #3
 695 029e ACE0     		b	.L30
 696              	.LVL61:
 697              	.L114:
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 698              		.loc 1 557 0 discriminator 1
 699 02a0 084A     		ldr	r2, .L123
 700 02a2 136A     		ldr	r3, [r2, #32]
 701 02a4 43F00103 		orr	r3, r3, #1
 702 02a8 1362     		str	r3, [r2, #32]
 703 02aa BDE7     		b	.L64
 704              	.L65:
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 705              		.loc 1 557 0 is_stmt 0 discriminator 4
 706 02ac 052B     		cmp	r3, #5
 707 02ae 11D0     		beq	.L115
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 708              		.loc 1 557 0 discriminator 6
 709 02b0 044B     		ldr	r3, .L123
 710 02b2 1A6A     		ldr	r2, [r3, #32]
 711 02b4 22F00102 		bic	r2, r2, #1
 712 02b8 1A62     		str	r2, [r3, #32]
 713 02ba 1A6A     		ldr	r2, [r3, #32]
 714 02bc 22F00402 		bic	r2, r2, #4
 715 02c0 1A62     		str	r2, [r3, #32]
 716 02c2 B1E7     		b	.L64
 717              	.L124:
 718              		.align	2
 719              	.L123:
 720 02c4 00100240 		.word	1073876992
 721 02c8 00004242 		.word	1111621632
 722 02cc 80044242 		.word	1111622784
 723 02d0 00700040 		.word	1073770496
 724              	.L115:
 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     /* Check the LSE State */
 725              		.loc 1 557 0 discriminator 5
 726 02d4 4C4B     		ldr	r3, .L125
 727 02d6 1A6A     		ldr	r2, [r3, #32]
 728 02d8 42F00402 		orr	r2, r2, #4
 729 02dc 1A62     		str	r2, [r3, #32]
 730 02de 1A6A     		ldr	r2, [r3, #32]
 731 02e0 42F00102 		orr	r2, r2, #1
 732 02e4 1A62     		str	r2, [r3, #32]
 733 02e6 9FE7     		b	.L64
 734              	.L67:
 576:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 735              		.loc 1 576 0 is_stmt 1
 736 02e8 FFF7FEFF 		bl	HAL_GetTick
 737              	.LVL62:
 738 02ec 0646     		mov	r6, r0
 739              	.LVL63:
 740              	.L71:
 579:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 741              		.loc 1 579 0
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 40


 742 02ee 464B     		ldr	r3, .L125
 743 02f0 1B6A     		ldr	r3, [r3, #32]
 744 02f2 13F0020F 		tst	r3, #2
 745 02f6 08D0     		beq	.L70
 581:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 746              		.loc 1 581 0
 747 02f8 FFF7FEFF 		bl	HAL_GetTick
 748              	.LVL64:
 749 02fc 801B     		subs	r0, r0, r6
 750 02fe 41F28833 		movw	r3, #5000
 751 0302 9842     		cmp	r0, r3
 752 0304 F3D9     		bls	.L71
 583:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 753              		.loc 1 583 0
 754 0306 0320     		movs	r0, #3
 755 0308 77E0     		b	.L30
 756              	.L70:
 589:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 757              		.loc 1 589 0
 758 030a E5B9     		cbnz	r5, .L116
 759              	.LVL65:
 760              	.L58:
 761              	.LBE4:
 688:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 762              		.loc 1 688 0
 763 030c E369     		ldr	r3, [r4, #28]
 764 030e 002B     		cmp	r3, #0
 765 0310 72D0     		beq	.L95
 691:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 766              		.loc 1 691 0
 767 0312 3D4A     		ldr	r2, .L125
 768 0314 5268     		ldr	r2, [r2, #4]
 769 0316 02F00C02 		and	r2, r2, #12
 770 031a 082A     		cmp	r2, #8
 771 031c 56D0     		beq	.L73
 693:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 772              		.loc 1 693 0
 773 031e 022B     		cmp	r3, #2
 774 0320 17D0     		beq	.L117
 752:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 775              		.loc 1 752 0
 776 0322 0022     		movs	r2, #0
 777 0324 394B     		ldr	r3, .L125+4
 778 0326 1A60     		str	r2, [r3]
 755:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 779              		.loc 1 755 0
 780 0328 FFF7FEFF 		bl	HAL_GetTick
 781              	.LVL66:
 782 032c 0446     		mov	r4, r0
 783              	.LVL67:
 784              	.L80:
 758:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 785              		.loc 1 758 0
 786 032e 364B     		ldr	r3, .L125
 787 0330 1B68     		ldr	r3, [r3]
 788 0332 13F0007F 		tst	r3, #33554432
 789 0336 47D0     		beq	.L118
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 41


 760:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 790              		.loc 1 760 0
 791 0338 FFF7FEFF 		bl	HAL_GetTick
 792              	.LVL68:
 793 033c 001B     		subs	r0, r0, r4
 794 033e 0228     		cmp	r0, #2
 795 0340 F5D9     		bls	.L80
 762:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 796              		.loc 1 762 0
 797 0342 0320     		movs	r0, #3
 798 0344 59E0     		b	.L30
 799              	.LVL69:
 800              	.L116:
 801              	.LBB5:
 591:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 802              		.loc 1 591 0
 803 0346 304A     		ldr	r2, .L125
 804 0348 D369     		ldr	r3, [r2, #28]
 805 034a 23F08053 		bic	r3, r3, #268435456
 806 034e D361     		str	r3, [r2, #28]
 807 0350 DCE7     		b	.L58
 808              	.LVL70:
 809              	.L117:
 810              	.LBE5:
 700:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 811              		.loc 1 700 0
 812 0352 0022     		movs	r2, #0
 813 0354 2D4B     		ldr	r3, .L125+4
 814 0356 1A60     		str	r2, [r3]
 703:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 815              		.loc 1 703 0
 816 0358 FFF7FEFF 		bl	HAL_GetTick
 817              	.LVL71:
 818 035c 0546     		mov	r5, r0
 819              	.LVL72:
 820              	.L75:
 706:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 821              		.loc 1 706 0
 822 035e 2A4B     		ldr	r3, .L125
 823 0360 1B68     		ldr	r3, [r3]
 824 0362 13F0007F 		tst	r3, #33554432
 825 0366 06D0     		beq	.L119
 708:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 826              		.loc 1 708 0
 827 0368 FFF7FEFF 		bl	HAL_GetTick
 828              	.LVL73:
 829 036c 401B     		subs	r0, r0, r5
 830 036e 0228     		cmp	r0, #2
 831 0370 F5D9     		bls	.L75
 710:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 832              		.loc 1 710 0
 833 0372 0320     		movs	r0, #3
 834 0374 41E0     		b	.L30
 835              	.L119:
 716:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 836              		.loc 1 716 0
 837 0376 236A     		ldr	r3, [r4, #32]
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 42


 838 0378 B3F5803F 		cmp	r3, #65536
 839 037c 1AD0     		beq	.L120
 840              	.L77:
 732:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLMUL);
 841              		.loc 1 732 0
 842 037e 2249     		ldr	r1, .L125
 843 0380 4B68     		ldr	r3, [r1, #4]
 844 0382 23F47413 		bic	r3, r3, #3997696
 845 0386 226A     		ldr	r2, [r4, #32]
 846 0388 606A     		ldr	r0, [r4, #36]
 847 038a 0243     		orrs	r2, r2, r0
 848 038c 1343     		orrs	r3, r3, r2
 849 038e 4B60     		str	r3, [r1, #4]
 735:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 850              		.loc 1 735 0
 851 0390 0122     		movs	r2, #1
 852 0392 1E4B     		ldr	r3, .L125+4
 853 0394 1A60     		str	r2, [r3]
 738:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 854              		.loc 1 738 0
 855 0396 FFF7FEFF 		bl	HAL_GetTick
 856              	.LVL74:
 857 039a 0446     		mov	r4, r0
 858              	.LVL75:
 859              	.L78:
 741:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 860              		.loc 1 741 0
 861 039c 1A4B     		ldr	r3, .L125
 862 039e 1B68     		ldr	r3, [r3]
 863 03a0 13F0007F 		tst	r3, #33554432
 864 03a4 0ED1     		bne	.L121
 743:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           {
 865              		.loc 1 743 0
 866 03a6 FFF7FEFF 		bl	HAL_GetTick
 867              	.LVL76:
 868 03aa 001B     		subs	r0, r0, r4
 869 03ac 0228     		cmp	r0, #2
 870 03ae F5D9     		bls	.L78
 745:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****           }
 871              		.loc 1 745 0
 872 03b0 0320     		movs	r0, #3
 873 03b2 22E0     		b	.L30
 874              	.LVL77:
 875              	.L120:
 728:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 876              		.loc 1 728 0
 877 03b4 144A     		ldr	r2, .L125
 878 03b6 5368     		ldr	r3, [r2, #4]
 879 03b8 23F40033 		bic	r3, r3, #131072
 880 03bc A168     		ldr	r1, [r4, #8]
 881 03be 0B43     		orrs	r3, r3, r1
 882 03c0 5360     		str	r3, [r2, #4]
 883 03c2 DCE7     		b	.L77
 884              	.LVL78:
 885              	.L121:
 787:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 886              		.loc 1 787 0
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 43


 887 03c4 0020     		movs	r0, #0
 888 03c6 18E0     		b	.L30
 889              	.L118:
 890 03c8 0020     		movs	r0, #0
 891 03ca 16E0     		b	.L30
 892              	.LVL79:
 893              	.L73:
 770:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 894              		.loc 1 770 0
 895 03cc 012B     		cmp	r3, #1
 896 03ce 16D0     		beq	.L99
 777:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 897              		.loc 1 777 0
 898 03d0 0D4B     		ldr	r3, .L125
 899 03d2 5B68     		ldr	r3, [r3, #4]
 900              	.LVL80:
 778:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
 901              		.loc 1 778 0
 902 03d4 03F48031 		and	r1, r3, #65536
 903 03d8 226A     		ldr	r2, [r4, #32]
 904 03da 9142     		cmp	r1, r2
 905 03dc 01D0     		beq	.L122
 781:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 906              		.loc 1 781 0
 907 03de 0120     		movs	r0, #1
 908 03e0 0BE0     		b	.L30
 909              	.L122:
 779:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         {
 910              		.loc 1 779 0 discriminator 1
 911 03e2 03F47013 		and	r3, r3, #3932160
 912              	.LVL81:
 913 03e6 626A     		ldr	r2, [r4, #36]
 778:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****             (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
 914              		.loc 1 778 0 discriminator 1
 915 03e8 9342     		cmp	r3, r2
 916 03ea 0AD0     		beq	.L101
 781:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****         }
 917              		.loc 1 781 0
 918 03ec 0120     		movs	r0, #1
 919 03ee 04E0     		b	.L30
 920              	.LVL82:
 921              	.L82:
 922              	.LCFI5:
 923              		.cfi_def_cfa_offset 0
 924              		.cfi_restore 4
 925              		.cfi_restore 5
 926              		.cfi_restore 6
 927              		.cfi_restore 14
 355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 928              		.loc 1 355 0
 929 03f0 0120     		movs	r0, #1
 930              	.LVL83:
 931 03f2 7047     		bx	lr
 932              	.LVL84:
 933              	.L108:
 934              	.LCFI6:
 935              		.cfi_def_cfa_offset 24
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 44


 936              		.cfi_offset 4, -16
 937              		.cfi_offset 5, -12
 938              		.cfi_offset 6, -8
 939              		.cfi_offset 14, -4
 373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 940              		.loc 1 373 0
 941 03f4 0120     		movs	r0, #1
 942              	.LVL85:
 943 03f6 00E0     		b	.L30
 944              	.L95:
 787:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 945              		.loc 1 787 0
 946 03f8 0020     		movs	r0, #0
 947              	.LVL86:
 948              	.L30:
 788:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 949              		.loc 1 788 0
 950 03fa 02B0     		add	sp, sp, #8
 951              	.LCFI7:
 952              		.cfi_remember_state
 953              		.cfi_def_cfa_offset 16
 954              		@ sp needed
 955 03fc 70BD     		pop	{r4, r5, r6, pc}
 956              	.LVL87:
 957              	.L99:
 958              	.LCFI8:
 959              		.cfi_restore_state
 772:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 960              		.loc 1 772 0
 961 03fe 0120     		movs	r0, #1
 962 0400 FBE7     		b	.L30
 963              	.L101:
 787:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 964              		.loc 1 787 0
 965 0402 0020     		movs	r0, #0
 966 0404 F9E7     		b	.L30
 967              	.L126:
 968 0406 00BF     		.align	2
 969              	.L125:
 970 0408 00100240 		.word	1073876992
 971 040c 60004242 		.word	1111621728
 972              		.cfi_endproc
 973              	.LFE66:
 975              		.section	.text.HAL_RCC_MCOConfig,"ax",%progbits
 976              		.align	1
 977              		.global	HAL_RCC_MCOConfig
 978              		.syntax unified
 979              		.thumb
 980              		.thumb_func
 981              		.fpu softvfp
 983              	HAL_RCC_MCOConfig:
 984              	.LFB68:
1003:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   GPIO_InitTypeDef gpio = {0U};
 985              		.loc 1 1003 0
 986              		.cfi_startproc
 987              		@ args = 0, pretend = 0, frame = 24
 988              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 45


 989              	.LVL88:
 990 0000 30B5     		push	{r4, r5, lr}
 991              	.LCFI9:
 992              		.cfi_def_cfa_offset 12
 993              		.cfi_offset 4, -12
 994              		.cfi_offset 5, -8
 995              		.cfi_offset 14, -4
 996 0002 87B0     		sub	sp, sp, #28
 997              	.LCFI10:
 998              		.cfi_def_cfa_offset 40
 999 0004 0D46     		mov	r5, r1
1004:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1000              		.loc 1 1004 0
 1001 0006 0023     		movs	r3, #0
 1002 0008 0493     		str	r3, [sp, #16]
1016:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   gpio.Speed     = GPIO_SPEED_FREQ_HIGH;
 1003              		.loc 1 1016 0
 1004 000a 0223     		movs	r3, #2
 1005 000c 0393     		str	r3, [sp, #12]
1017:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   gpio.Pull      = GPIO_NOPULL;
 1006              		.loc 1 1017 0
 1007 000e 0323     		movs	r3, #3
 1008 0010 0593     		str	r3, [sp, #20]
1019:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1009              		.loc 1 1019 0
 1010 0012 4FF48073 		mov	r3, #256
 1011 0016 0293     		str	r3, [sp, #8]
 1012              	.LBB6:
1022:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1013              		.loc 1 1022 0
 1014 0018 0A4C     		ldr	r4, .L129
 1015 001a A369     		ldr	r3, [r4, #24]
 1016 001c 43F00403 		orr	r3, r3, #4
 1017 0020 A361     		str	r3, [r4, #24]
 1018 0022 A369     		ldr	r3, [r4, #24]
 1019 0024 03F00403 		and	r3, r3, #4
 1020 0028 0193     		str	r3, [sp, #4]
 1021 002a 019B     		ldr	r3, [sp, #4]
 1022              	.LBE6:
1024:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1023              		.loc 1 1024 0
 1024 002c 02A9     		add	r1, sp, #8
 1025              	.LVL89:
 1026 002e 0648     		ldr	r0, .L129+4
 1027              	.LVL90:
 1028 0030 FFF7FEFF 		bl	HAL_GPIO_Init
 1029              	.LVL91:
1027:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 1030              		.loc 1 1027 0
 1031 0034 6168     		ldr	r1, [r4, #4]
 1032 0036 21F0E061 		bic	r1, r1, #117440512
 1033 003a 2943     		orrs	r1, r1, r5
 1034 003c 6160     		str	r1, [r4, #4]
1028:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1035              		.loc 1 1028 0
 1036 003e 07B0     		add	sp, sp, #28
 1037              	.LCFI11:
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 46


 1038              		.cfi_def_cfa_offset 12
 1039              		@ sp needed
 1040 0040 30BD     		pop	{r4, r5, pc}
 1041              	.LVL92:
 1042              	.L130:
 1043 0042 00BF     		.align	2
 1044              	.L129:
 1045 0044 00100240 		.word	1073876992
 1046 0048 00080140 		.word	1073809408
 1047              		.cfi_endproc
 1048              	.LFE68:
 1050              		.section	.text.HAL_RCC_EnableCSS,"ax",%progbits
 1051              		.align	1
 1052              		.global	HAL_RCC_EnableCSS
 1053              		.syntax unified
 1054              		.thumb
 1055              		.thumb_func
 1056              		.fpu softvfp
 1058              	HAL_RCC_EnableCSS:
 1059              	.LFB69:
1040:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE;
 1060              		.loc 1 1040 0
 1061              		.cfi_startproc
 1062              		@ args = 0, pretend = 0, frame = 0
 1063              		@ frame_needed = 0, uses_anonymous_args = 0
 1064              		@ link register save eliminated.
1041:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 1065              		.loc 1 1041 0
 1066 0000 0122     		movs	r2, #1
 1067 0002 014B     		ldr	r3, .L132
 1068 0004 1A60     		str	r2, [r3]
 1069 0006 7047     		bx	lr
 1070              	.L133:
 1071              		.align	2
 1072              	.L132:
 1073 0008 4C004242 		.word	1111621708
 1074              		.cfi_endproc
 1075              	.LFE69:
 1077              		.section	.text.HAL_RCC_DisableCSS,"ax",%progbits
 1078              		.align	1
 1079              		.global	HAL_RCC_DisableCSS
 1080              		.syntax unified
 1081              		.thumb
 1082              		.thumb_func
 1083              		.fpu softvfp
 1085              	HAL_RCC_DisableCSS:
 1086              	.LFB70:
1049:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE;
 1087              		.loc 1 1049 0
 1088              		.cfi_startproc
 1089              		@ args = 0, pretend = 0, frame = 0
 1090              		@ frame_needed = 0, uses_anonymous_args = 0
 1091              		@ link register save eliminated.
1050:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 1092              		.loc 1 1050 0
 1093 0000 0022     		movs	r2, #0
 1094 0002 014B     		ldr	r3, .L135
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 47


 1095 0004 1A60     		str	r2, [r3]
 1096 0006 7047     		bx	lr
 1097              	.L136:
 1098              		.align	2
 1099              	.L135:
 1100 0008 4C004242 		.word	1111621708
 1101              		.cfi_endproc
 1102              	.LFE70:
 1104              		.section	.text.HAL_RCC_GetSysClockFreq,"ax",%progbits
 1105              		.align	1
 1106              		.global	HAL_RCC_GetSysClockFreq
 1107              		.syntax unified
 1108              		.thumb
 1109              		.thumb_func
 1110              		.fpu softvfp
 1112              	HAL_RCC_GetSysClockFreq:
 1113              	.LFB71:
1083:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1SRC)
 1114              		.loc 1 1083 0
 1115              		.cfi_startproc
 1116              		@ args = 0, pretend = 0, frame = 24
 1117              		@ frame_needed = 0, uses_anonymous_args = 0
 1118 0000 10B5     		push	{r4, lr}
 1119              	.LCFI12:
 1120              		.cfi_def_cfa_offset 8
 1121              		.cfi_offset 4, -8
 1122              		.cfi_offset 14, -4
 1123 0002 86B0     		sub	sp, sp, #24
 1124              	.LCFI13:
 1125              		.cfi_def_cfa_offset 32
1088:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CFGR2_PREDIV1)
 1126              		.loc 1 1088 0
 1127 0004 154C     		ldr	r4, .L145
 1128 0006 94E80F00 		ldm	r4, {r0, r1, r2, r3}
 1129 000a 0DF1180E 		add	lr, sp, #24
 1130 000e 0EE90F00 		stmdb	lr, {r0, r1, r2, r3}
1092:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /*RCC_CFGR2_PREDIV1*/
 1131              		.loc 1 1092 0
 1132 0012 238A     		ldrh	r3, [r4, #16]
 1133 0014 ADF80430 		strh	r3, [sp, #4]	@ movhi
 1134              	.LVL93:
1102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1135              		.loc 1 1102 0
 1136 0018 114B     		ldr	r3, .L145+4
 1137 001a 5B68     		ldr	r3, [r3, #4]
 1138              	.LVL94:
1105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1139              		.loc 1 1105 0
 1140 001c 03F00C02 		and	r2, r3, #12
 1141 0020 082A     		cmp	r2, #8
 1142 0022 18D1     		bne	.L142
1114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
 1143              		.loc 1 1114 0
 1144 0024 C3F38342 		ubfx	r2, r3, #18, #4
 1145 0028 7244     		add	r2, r2, lr
 1146 002a 12F8102C 		ldrb	r2, [r2, #-16]	@ zero_extendqisi2
 1147              	.LVL95:
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 48


1115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 1148              		.loc 1 1115 0
 1149 002e 13F4803F 		tst	r3, #65536
 1150 0032 03D1     		bne	.L144
1152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 1151              		.loc 1 1152 0
 1152 0034 0B48     		ldr	r0, .L145+8
 1153 0036 00FB02F0 		mul	r0, r0, r2
 1154              	.LVL96:
 1155 003a 0DE0     		b	.L137
 1156              	.LVL97:
 1157              	.L144:
1120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /*RCC_CFGR2_PREDIV1*/
 1158              		.loc 1 1120 0
 1159 003c 084B     		ldr	r3, .L145+4
 1160              	.LVL98:
 1161 003e 5B68     		ldr	r3, [r3, #4]
 1162 0040 C3F34043 		ubfx	r3, r3, #17, #1
 1163 0044 7344     		add	r3, r3, lr
 1164 0046 13F8143C 		ldrb	r3, [r3, #-20]	@ zero_extendqisi2
 1165              	.LVL99:
1146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #endif /*RCC_CFGR2_PREDIV1SRC*/
 1166              		.loc 1 1146 0
 1167 004a 0748     		ldr	r0, .L145+12
 1168 004c 00FB02F0 		mul	r0, r0, r2
 1169 0050 B0FBF3F0 		udiv	r0, r0, r3
 1170              	.LVL100:
 1171 0054 00E0     		b	.L137
 1172              	.LVL101:
 1173              	.L142:
1109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       break;
 1174              		.loc 1 1109 0
 1175 0056 0448     		ldr	r0, .L145+12
 1176              	.LVL102:
 1177              	.L137:
1165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1178              		.loc 1 1165 0
 1179 0058 06B0     		add	sp, sp, #24
 1180              	.LCFI14:
 1181              		.cfi_def_cfa_offset 8
 1182              		@ sp needed
 1183 005a 10BD     		pop	{r4, pc}
 1184              	.L146:
 1185              		.align	2
 1186              	.L145:
 1187 005c 00000000 		.word	.LANCHOR0
 1188 0060 00100240 		.word	1073876992
 1189 0064 00093D00 		.word	4000000
 1190 0068 00127A00 		.word	8000000
 1191              		.cfi_endproc
 1192              	.LFE71:
 1194              		.section	.text.HAL_RCC_ClockConfig,"ax",%progbits
 1195              		.align	1
 1196              		.global	HAL_RCC_ClockConfig
 1197              		.syntax unified
 1198              		.thumb
 1199              		.thumb_func
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 49


 1200              		.fpu softvfp
 1202              	HAL_RCC_ClockConfig:
 1203              	.LFB67:
 814:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
 1204              		.loc 1 814 0
 1205              		.cfi_startproc
 1206              		@ args = 0, pretend = 0, frame = 0
 1207              		@ frame_needed = 0, uses_anonymous_args = 0
 1208              	.LVL103:
 818:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1209              		.loc 1 818 0
 1210 0000 0028     		cmp	r0, #0
 1211 0002 00F0A380 		beq	.L162
 814:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   uint32_t tickstart;
 1212              		.loc 1 814 0
 1213 0006 70B5     		push	{r4, r5, r6, lr}
 1214              	.LCFI15:
 1215              		.cfi_def_cfa_offset 16
 1216              		.cfi_offset 4, -16
 1217              		.cfi_offset 5, -12
 1218              		.cfi_offset 6, -8
 1219              		.cfi_offset 14, -4
 1220 0008 0446     		mov	r4, r0
 833:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1221              		.loc 1 833 0
 1222 000a 524B     		ldr	r3, .L175
 1223 000c 1B68     		ldr	r3, [r3]
 1224 000e 03F00703 		and	r3, r3, #7
 1225 0012 8B42     		cmp	r3, r1
 1226 0014 0CD2     		bcs	.L149
 836:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1227              		.loc 1 836 0
 1228 0016 4F4A     		ldr	r2, .L175
 1229 0018 1368     		ldr	r3, [r2]
 1230 001a 23F00703 		bic	r3, r3, #7
 1231 001e 0B43     		orrs	r3, r3, r1
 1232 0020 1360     		str	r3, [r2]
 840:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1233              		.loc 1 840 0
 1234 0022 1368     		ldr	r3, [r2]
 1235 0024 03F00703 		and	r3, r3, #7
 1236 0028 9942     		cmp	r1, r3
 1237 002a 01D0     		beq	.L149
 842:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1238              		.loc 1 842 0
 1239 002c 0120     		movs	r0, #1
 1240              	.LVL104:
 1241 002e 70BD     		pop	{r4, r5, r6, pc}
 1242              	.LVL105:
 1243              	.L149:
 848:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1244              		.loc 1 848 0
 1245 0030 2368     		ldr	r3, [r4]
 1246 0032 13F0020F 		tst	r3, #2
 1247 0036 17D0     		beq	.L150
 852:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 1248              		.loc 1 852 0
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 50


 1249 0038 13F0040F 		tst	r3, #4
 1250 003c 04D0     		beq	.L151
 854:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 1251              		.loc 1 854 0
 1252 003e 464A     		ldr	r2, .L175+4
 1253 0040 5368     		ldr	r3, [r2, #4]
 1254 0042 43F4E063 		orr	r3, r3, #1792
 1255 0046 5360     		str	r3, [r2, #4]
 1256              	.L151:
 857:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 1257              		.loc 1 857 0
 1258 0048 2368     		ldr	r3, [r4]
 1259 004a 13F0080F 		tst	r3, #8
 1260 004e 04D0     		beq	.L152
 859:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     }
 1261              		.loc 1 859 0
 1262 0050 414A     		ldr	r2, .L175+4
 1263 0052 5368     		ldr	r3, [r2, #4]
 1264 0054 43F46053 		orr	r3, r3, #14336
 1265 0058 5360     		str	r3, [r2, #4]
 1266              	.L152:
 864:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1267              		.loc 1 864 0
 1268 005a 3F4A     		ldr	r2, .L175+4
 1269 005c 5368     		ldr	r3, [r2, #4]
 1270 005e 23F0F003 		bic	r3, r3, #240
 1271 0062 A068     		ldr	r0, [r4, #8]
 1272              	.LVL106:
 1273 0064 0343     		orrs	r3, r3, r0
 1274 0066 5360     		str	r3, [r2, #4]
 1275              	.L150:
 1276 0068 0D46     		mov	r5, r1
 868:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1277              		.loc 1 868 0
 1278 006a 2368     		ldr	r3, [r4]
 1279 006c 13F0010F 		tst	r3, #1
 1280 0070 31D0     		beq	.L153
 873:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 1281              		.loc 1 873 0
 1282 0072 6368     		ldr	r3, [r4, #4]
 1283 0074 012B     		cmp	r3, #1
 1284 0076 20D0     		beq	.L173
 882:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 1285              		.loc 1 882 0
 1286 0078 022B     		cmp	r3, #2
 1287 007a 25D0     		beq	.L174
 894:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 1288              		.loc 1 894 0
 1289 007c 364A     		ldr	r2, .L175+4
 1290 007e 1268     		ldr	r2, [r2]
 1291 0080 12F0020F 		tst	r2, #2
 1292 0084 64D0     		beq	.L166
 1293              	.L155:
 899:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1294              		.loc 1 899 0
 1295 0086 3449     		ldr	r1, .L175+4
 1296              	.LVL107:
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 51


 1297 0088 4A68     		ldr	r2, [r1, #4]
 1298 008a 22F00302 		bic	r2, r2, #3
 1299 008e 1343     		orrs	r3, r3, r2
 1300 0090 4B60     		str	r3, [r1, #4]
 902:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1301              		.loc 1 902 0
 1302 0092 FFF7FEFF 		bl	HAL_GetTick
 1303              	.LVL108:
 1304 0096 0646     		mov	r6, r0
 1305              	.LVL109:
 1306              	.L157:
 904:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****     {
 1307              		.loc 1 904 0
 1308 0098 2F4B     		ldr	r3, .L175+4
 1309 009a 5B68     		ldr	r3, [r3, #4]
 1310 009c 03F00C03 		and	r3, r3, #12
 1311 00a0 6268     		ldr	r2, [r4, #4]
 1312 00a2 B3EB820F 		cmp	r3, r2, lsl #2
 1313 00a6 16D0     		beq	.L153
 906:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 1314              		.loc 1 906 0
 1315 00a8 FFF7FEFF 		bl	HAL_GetTick
 1316              	.LVL110:
 1317 00ac 801B     		subs	r0, r0, r6
 1318 00ae 41F28833 		movw	r3, #5000
 1319 00b2 9842     		cmp	r0, r3
 1320 00b4 F0D9     		bls	.L157
 908:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 1321              		.loc 1 908 0
 1322 00b6 0320     		movs	r0, #3
 1323 00b8 70BD     		pop	{r4, r5, r6, pc}
 1324              	.LVL111:
 1325              	.L173:
 876:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 1326              		.loc 1 876 0
 1327 00ba 274A     		ldr	r2, .L175+4
 1328 00bc 1268     		ldr	r2, [r2]
 1329 00be 12F4003F 		tst	r2, #131072
 1330 00c2 E0D1     		bne	.L155
 878:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 1331              		.loc 1 878 0
 1332 00c4 0120     		movs	r0, #1
 1333 00c6 70BD     		pop	{r4, r5, r6, pc}
 1334              	.LVL112:
 1335              	.L174:
 885:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       {
 1336              		.loc 1 885 0
 1337 00c8 234A     		ldr	r2, .L175+4
 1338 00ca 1268     		ldr	r2, [r2]
 1339 00cc 12F0007F 		tst	r2, #33554432
 1340 00d0 D9D1     		bne	.L155
 887:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 1341              		.loc 1 887 0
 1342 00d2 0120     		movs	r0, #1
 1343 00d4 70BD     		pop	{r4, r5, r6, pc}
 1344              	.LVL113:
 1345              	.L153:
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 52


 915:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1346              		.loc 1 915 0
 1347 00d6 1F4B     		ldr	r3, .L175
 1348 00d8 1B68     		ldr	r3, [r3]
 1349 00da 03F00703 		and	r3, r3, #7
 1350 00de 9D42     		cmp	r5, r3
 1351 00e0 0CD2     		bcs	.L159
 918:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1352              		.loc 1 918 0
 1353 00e2 1C4A     		ldr	r2, .L175
 1354 00e4 1368     		ldr	r3, [r2]
 1355 00e6 23F00703 		bic	r3, r3, #7
 1356 00ea 2B43     		orrs	r3, r3, r5
 1357 00ec 1360     		str	r3, [r2]
 922:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1358              		.loc 1 922 0
 1359 00ee 1368     		ldr	r3, [r2]
 1360 00f0 03F00703 		and	r3, r3, #7
 1361 00f4 9D42     		cmp	r5, r3
 1362 00f6 01D0     		beq	.L159
 924:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1363              		.loc 1 924 0
 1364 00f8 0120     		movs	r0, #1
 950:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1365              		.loc 1 950 0
 1366 00fa 70BD     		pop	{r4, r5, r6, pc}
 1367              	.LVL114:
 1368              	.L159:
 930:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1369              		.loc 1 930 0
 1370 00fc 2368     		ldr	r3, [r4]
 1371 00fe 13F0040F 		tst	r3, #4
 1372 0102 06D0     		beq	.L160
 933:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1373              		.loc 1 933 0
 1374 0104 144A     		ldr	r2, .L175+4
 1375 0106 5368     		ldr	r3, [r2, #4]
 1376 0108 23F4E063 		bic	r3, r3, #1792
 1377 010c E168     		ldr	r1, [r4, #12]
 1378 010e 0B43     		orrs	r3, r3, r1
 1379 0110 5360     		str	r3, [r2, #4]
 1380              	.L160:
 937:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1381              		.loc 1 937 0
 1382 0112 2368     		ldr	r3, [r4]
 1383 0114 13F0080F 		tst	r3, #8
 1384 0118 07D0     		beq	.L161
 940:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1385              		.loc 1 940 0
 1386 011a 0F4A     		ldr	r2, .L175+4
 1387 011c 5368     		ldr	r3, [r2, #4]
 1388 011e 23F46053 		bic	r3, r3, #14336
 1389 0122 2169     		ldr	r1, [r4, #16]
 1390 0124 43EAC103 		orr	r3, r3, r1, lsl #3
 1391 0128 5360     		str	r3, [r2, #4]
 1392              	.L161:
 944:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 53


 1393              		.loc 1 944 0
 1394 012a FFF7FEFF 		bl	HAL_RCC_GetSysClockFreq
 1395              	.LVL115:
 1396 012e 0A4B     		ldr	r3, .L175+4
 1397 0130 5B68     		ldr	r3, [r3, #4]
 1398 0132 C3F30313 		ubfx	r3, r3, #4, #4
 1399 0136 094A     		ldr	r2, .L175+8
 1400 0138 D35C     		ldrb	r3, [r2, r3]	@ zero_extendqisi2
 1401 013a D840     		lsrs	r0, r0, r3
 1402 013c 084B     		ldr	r3, .L175+12
 1403 013e 1860     		str	r0, [r3]
 947:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1404              		.loc 1 947 0
 1405 0140 084B     		ldr	r3, .L175+16
 1406 0142 1868     		ldr	r0, [r3]
 1407 0144 FFF7FEFF 		bl	HAL_InitTick
 1408              	.LVL116:
 949:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 1409              		.loc 1 949 0
 1410 0148 0020     		movs	r0, #0
 1411 014a 70BD     		pop	{r4, r5, r6, pc}
 1412              	.LVL117:
 1413              	.L162:
 1414              	.LCFI16:
 1415              		.cfi_def_cfa_offset 0
 1416              		.cfi_restore 4
 1417              		.cfi_restore 5
 1418              		.cfi_restore 6
 1419              		.cfi_restore 14
 820:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1420              		.loc 1 820 0
 1421 014c 0120     		movs	r0, #1
 1422              	.LVL118:
 1423 014e 7047     		bx	lr
 1424              	.LVL119:
 1425              	.L166:
 1426              	.LCFI17:
 1427              		.cfi_def_cfa_offset 16
 1428              		.cfi_offset 4, -16
 1429              		.cfi_offset 5, -12
 1430              		.cfi_offset 6, -8
 1431              		.cfi_offset 14, -4
 896:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****       }
 1432              		.loc 1 896 0
 1433 0150 0120     		movs	r0, #1
 1434 0152 70BD     		pop	{r4, r5, r6, pc}
 1435              	.LVL120:
 1436              	.L176:
 1437              		.align	2
 1438              	.L175:
 1439 0154 00200240 		.word	1073881088
 1440 0158 00100240 		.word	1073876992
 1441 015c 00000000 		.word	AHBPrescTable
 1442 0160 00000000 		.word	SystemCoreClock
 1443 0164 00000000 		.word	uwTickPrio
 1444              		.cfi_endproc
 1445              	.LFE67:
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 54


 1447              		.section	.text.HAL_RCC_GetHCLKFreq,"ax",%progbits
 1448              		.align	1
 1449              		.global	HAL_RCC_GetHCLKFreq
 1450              		.syntax unified
 1451              		.thumb
 1452              		.thumb_func
 1453              		.fpu softvfp
 1455              	HAL_RCC_GetHCLKFreq:
 1456              	.LFB72:
1177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   return SystemCoreClock;
 1457              		.loc 1 1177 0
 1458              		.cfi_startproc
 1459              		@ args = 0, pretend = 0, frame = 0
 1460              		@ frame_needed = 0, uses_anonymous_args = 0
 1461              		@ link register save eliminated.
1179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1462              		.loc 1 1179 0
 1463 0000 014B     		ldr	r3, .L178
 1464 0002 1868     		ldr	r0, [r3]
 1465 0004 7047     		bx	lr
 1466              	.L179:
 1467 0006 00BF     		.align	2
 1468              	.L178:
 1469 0008 00000000 		.word	SystemCoreClock
 1470              		.cfi_endproc
 1471              	.LFE72:
 1473              		.section	.text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
 1474              		.align	1
 1475              		.global	HAL_RCC_GetPCLK1Freq
 1476              		.syntax unified
 1477              		.thumb
 1478              		.thumb_func
 1479              		.fpu softvfp
 1481              	HAL_RCC_GetPCLK1Freq:
 1482              	.LFB73:
1188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
 1483              		.loc 1 1188 0
 1484              		.cfi_startproc
 1485              		@ args = 0, pretend = 0, frame = 0
 1486              		@ frame_needed = 0, uses_anonymous_args = 0
 1487 0000 08B5     		push	{r3, lr}
 1488              	.LCFI18:
 1489              		.cfi_def_cfa_offset 8
 1490              		.cfi_offset 3, -8
 1491              		.cfi_offset 14, -4
1190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 1492              		.loc 1 1190 0
 1493 0002 FFF7FEFF 		bl	HAL_RCC_GetHCLKFreq
 1494              	.LVL121:
 1495 0006 044B     		ldr	r3, .L182
 1496 0008 5B68     		ldr	r3, [r3, #4]
 1497 000a C3F30223 		ubfx	r3, r3, #8, #3
 1498 000e 034A     		ldr	r2, .L182+4
 1499 0010 D35C     		ldrb	r3, [r2, r3]	@ zero_extendqisi2
1191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1500              		.loc 1 1191 0
 1501 0012 D840     		lsrs	r0, r0, r3
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 55


 1502 0014 08BD     		pop	{r3, pc}
 1503              	.L183:
 1504 0016 00BF     		.align	2
 1505              	.L182:
 1506 0018 00100240 		.word	1073876992
 1507 001c 00000000 		.word	APBPrescTable
 1508              		.cfi_endproc
 1509              	.LFE73:
 1511              		.section	.text.HAL_RCC_GetPCLK2Freq,"ax",%progbits
 1512              		.align	1
 1513              		.global	HAL_RCC_GetPCLK2Freq
 1514              		.syntax unified
 1515              		.thumb
 1516              		.thumb_func
 1517              		.fpu softvfp
 1519              	HAL_RCC_GetPCLK2Freq:
 1520              	.LFB74:
1200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
 1521              		.loc 1 1200 0
 1522              		.cfi_startproc
 1523              		@ args = 0, pretend = 0, frame = 0
 1524              		@ frame_needed = 0, uses_anonymous_args = 0
 1525 0000 08B5     		push	{r3, lr}
 1526              	.LCFI19:
 1527              		.cfi_def_cfa_offset 8
 1528              		.cfi_offset 3, -8
 1529              		.cfi_offset 14, -4
1202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** }
 1530              		.loc 1 1202 0
 1531 0002 FFF7FEFF 		bl	HAL_RCC_GetHCLKFreq
 1532              	.LVL122:
 1533 0006 044B     		ldr	r3, .L186
 1534 0008 5B68     		ldr	r3, [r3, #4]
 1535 000a C3F3C223 		ubfx	r3, r3, #11, #3
 1536 000e 034A     		ldr	r2, .L186+4
 1537 0010 D35C     		ldrb	r3, [r2, r3]	@ zero_extendqisi2
1203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1538              		.loc 1 1203 0
 1539 0012 D840     		lsrs	r0, r0, r3
 1540 0014 08BD     		pop	{r3, pc}
 1541              	.L187:
 1542 0016 00BF     		.align	2
 1543              	.L186:
 1544 0018 00100240 		.word	1073876992
 1545 001c 00000000 		.word	APBPrescTable
 1546              		.cfi_endproc
 1547              	.LFE74:
 1549              		.section	.text.HAL_RCC_GetOscConfig,"ax",%progbits
 1550              		.align	1
 1551              		.global	HAL_RCC_GetOscConfig
 1552              		.syntax unified
 1553              		.thumb
 1554              		.thumb_func
 1555              		.fpu softvfp
 1557              	HAL_RCC_GetOscConfig:
 1558              	.LFB75:
1213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 56


 1559              		.loc 1 1213 0
 1560              		.cfi_startproc
 1561              		@ args = 0, pretend = 0, frame = 0
 1562              		@ frame_needed = 0, uses_anonymous_args = 0
 1563              		@ link register save eliminated.
 1564              	.LVL123:
1218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****                                       | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI;
 1565              		.loc 1 1218 0
 1566 0000 0F23     		movs	r3, #15
 1567 0002 0360     		str	r3, [r0]
1227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1568              		.loc 1 1227 0
 1569 0004 2A4B     		ldr	r3, .L202
 1570 0006 1B68     		ldr	r3, [r3]
 1571 0008 13F4802F 		tst	r3, #262144
 1572 000c 30D0     		beq	.L189
1229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1573              		.loc 1 1229 0
 1574 000e 4FF4A023 		mov	r3, #327680
 1575 0012 4360     		str	r3, [r0, #4]
 1576              	.L190:
1239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1577              		.loc 1 1239 0
 1578 0014 264A     		ldr	r2, .L202
 1579 0016 5368     		ldr	r3, [r2, #4]
 1580 0018 03F40033 		and	r3, r3, #131072
 1581 001c 8360     		str	r3, [r0, #8]
1242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1582              		.loc 1 1242 0
 1583 001e 1368     		ldr	r3, [r2]
 1584 0020 13F0010F 		tst	r3, #1
 1585 0024 30D0     		beq	.L192
1244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1586              		.loc 1 1244 0
 1587 0026 0123     		movs	r3, #1
 1588 0028 0361     		str	r3, [r0, #16]
 1589              	.L193:
1251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1590              		.loc 1 1251 0
 1591 002a 214A     		ldr	r2, .L202
 1592 002c 1368     		ldr	r3, [r2]
 1593 002e C3F3C403 		ubfx	r3, r3, #3, #5
 1594 0032 4361     		str	r3, [r0, #20]
1254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1595              		.loc 1 1254 0
 1596 0034 136A     		ldr	r3, [r2, #32]
 1597 0036 13F0040F 		tst	r3, #4
 1598 003a 28D0     		beq	.L194
1256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1599              		.loc 1 1256 0
 1600 003c 0523     		movs	r3, #5
 1601 003e C360     		str	r3, [r0, #12]
 1602              	.L195:
1268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1603              		.loc 1 1268 0
 1604 0040 1B4B     		ldr	r3, .L202
 1605 0042 5B6A     		ldr	r3, [r3, #36]
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 57


 1606 0044 13F0010F 		tst	r3, #1
 1607 0048 2CD0     		beq	.L197
1270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1608              		.loc 1 1270 0
 1609 004a 0123     		movs	r3, #1
 1610 004c 8361     		str	r3, [r0, #24]
 1611              	.L198:
1279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1612              		.loc 1 1279 0
 1613 004e 184B     		ldr	r3, .L202
 1614 0050 1B68     		ldr	r3, [r3]
 1615 0052 13F0807F 		tst	r3, #16777216
 1616 0056 28D1     		bne	.L201
1285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1617              		.loc 1 1285 0
 1618 0058 0123     		movs	r3, #1
 1619 005a C361     		str	r3, [r0, #28]
 1620              	.L200:
1287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMULL);
 1621              		.loc 1 1287 0
 1622 005c 144A     		ldr	r2, .L202
 1623 005e 5368     		ldr	r3, [r2, #4]
 1624 0060 03F48033 		and	r3, r3, #65536
 1625 0064 0362     		str	r3, [r0, #32]
1288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #if defined(RCC_CR_PLL2ON)
 1626              		.loc 1 1288 0
 1627 0066 5368     		ldr	r3, [r2, #4]
 1628 0068 03F47013 		and	r3, r3, #3932160
 1629 006c 4362     		str	r3, [r0, #36]
 1630 006e 7047     		bx	lr
 1631              	.L189:
1231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1632              		.loc 1 1231 0
 1633 0070 0F4B     		ldr	r3, .L202
 1634 0072 1B68     		ldr	r3, [r3]
 1635 0074 13F4803F 		tst	r3, #65536
 1636 0078 03D0     		beq	.L191
1233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1637              		.loc 1 1233 0
 1638 007a 4FF48033 		mov	r3, #65536
 1639 007e 4360     		str	r3, [r0, #4]
 1640 0080 C8E7     		b	.L190
 1641              	.L191:
1237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1642              		.loc 1 1237 0
 1643 0082 0023     		movs	r3, #0
 1644 0084 4360     		str	r3, [r0, #4]
 1645 0086 C5E7     		b	.L190
 1646              	.L192:
1248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1647              		.loc 1 1248 0
 1648 0088 0023     		movs	r3, #0
 1649 008a 0361     		str	r3, [r0, #16]
 1650 008c CDE7     		b	.L193
 1651              	.L194:
1258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1652              		.loc 1 1258 0
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 58


 1653 008e 084B     		ldr	r3, .L202
 1654 0090 1B6A     		ldr	r3, [r3, #32]
 1655 0092 13F0010F 		tst	r3, #1
 1656 0096 02D0     		beq	.L196
1260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1657              		.loc 1 1260 0
 1658 0098 0123     		movs	r3, #1
 1659 009a C360     		str	r3, [r0, #12]
 1660 009c D0E7     		b	.L195
 1661              	.L196:
1264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1662              		.loc 1 1264 0
 1663 009e 0023     		movs	r3, #0
 1664 00a0 C360     		str	r3, [r0, #12]
 1665 00a2 CDE7     		b	.L195
 1666              	.L197:
1274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1667              		.loc 1 1274 0
 1668 00a4 0023     		movs	r3, #0
 1669 00a6 8361     		str	r3, [r0, #24]
 1670 00a8 D1E7     		b	.L198
 1671              	.L201:
1281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1672              		.loc 1 1281 0
 1673 00aa 0223     		movs	r3, #2
 1674 00ac C361     		str	r3, [r0, #28]
 1675 00ae D5E7     		b	.L200
 1676              	.L203:
 1677              		.align	2
 1678              	.L202:
 1679 00b0 00100240 		.word	1073876992
 1680              		.cfi_endproc
 1681              	.LFE75:
 1683              		.section	.text.HAL_RCC_GetClockConfig,"ax",%progbits
 1684              		.align	1
 1685              		.global	HAL_RCC_GetClockConfig
 1686              		.syntax unified
 1687              		.thumb
 1688              		.thumb_func
 1689              		.fpu softvfp
 1691              	HAL_RCC_GetClockConfig:
 1692              	.LFB76:
1313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check the parameters */
 1693              		.loc 1 1313 0
 1694              		.cfi_startproc
 1695              		@ args = 0, pretend = 0, frame = 0
 1696              		@ frame_needed = 0, uses_anonymous_args = 0
 1697              		@ link register save eliminated.
 1698              	.LVL124:
1319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1699              		.loc 1 1319 0
 1700 0000 0F23     		movs	r3, #15
 1701 0002 0360     		str	r3, [r0]
1322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1702              		.loc 1 1322 0
 1703 0004 0B4B     		ldr	r3, .L205
 1704 0006 5A68     		ldr	r2, [r3, #4]
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 59


 1705 0008 02F00302 		and	r2, r2, #3
 1706 000c 4260     		str	r2, [r0, #4]
1325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1707              		.loc 1 1325 0
 1708 000e 5A68     		ldr	r2, [r3, #4]
 1709 0010 02F0F002 		and	r2, r2, #240
 1710 0014 8260     		str	r2, [r0, #8]
1328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1711              		.loc 1 1328 0
 1712 0016 5A68     		ldr	r2, [r3, #4]
 1713 0018 02F4E062 		and	r2, r2, #1792
 1714 001c C260     		str	r2, [r0, #12]
1331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1715              		.loc 1 1331 0
 1716 001e 5B68     		ldr	r3, [r3, #4]
 1717 0020 DB08     		lsrs	r3, r3, #3
 1718 0022 03F4E063 		and	r3, r3, #1792
 1719 0026 0361     		str	r3, [r0, #16]
1335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** #else
 1720              		.loc 1 1335 0
 1721 0028 034B     		ldr	r3, .L205+4
 1722 002a 1B68     		ldr	r3, [r3]
 1723 002c 03F00703 		and	r3, r3, #7
 1724 0030 0B60     		str	r3, [r1]
 1725 0032 7047     		bx	lr
 1726              	.L206:
 1727              		.align	2
 1728              	.L205:
 1729 0034 00100240 		.word	1073876992
 1730 0038 00200240 		.word	1073881088
 1731              		.cfi_endproc
 1732              	.LFE76:
 1734              		.section	.text.HAL_RCC_CSSCallback,"ax",%progbits
 1735              		.align	1
 1736              		.weak	HAL_RCC_CSSCallback
 1737              		.syntax unified
 1738              		.thumb
 1739              		.thumb_func
 1740              		.fpu softvfp
 1742              	HAL_RCC_CSSCallback:
 1743              	.LFB79:
1374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
1375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** /**
1376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @brief  RCC Clock Security System interrupt callback
1377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   * @retval none
1378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   */
1379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
1380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** {
 1744              		.loc 1 1380 0
 1745              		.cfi_startproc
 1746              		@ args = 0, pretend = 0, frame = 0
 1747              		@ frame_needed = 0, uses_anonymous_args = 0
 1748              		@ link register save eliminated.
 1749 0000 7047     		bx	lr
 1750              		.cfi_endproc
 1751              	.LFE79:
 1753              		.section	.text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 60


 1754              		.align	1
 1755              		.global	HAL_RCC_NMI_IRQHandler
 1756              		.syntax unified
 1757              		.thumb
 1758              		.thumb_func
 1759              		.fpu softvfp
 1761              	HAL_RCC_NMI_IRQHandler:
 1762              	.LFB77:
1348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check RCC CSSF flag  */
 1763              		.loc 1 1348 0
 1764              		.cfi_startproc
 1765              		@ args = 0, pretend = 0, frame = 0
 1766              		@ frame_needed = 0, uses_anonymous_args = 0
1348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   /* Check RCC CSSF flag  */
 1767              		.loc 1 1348 0
 1768 0000 08B5     		push	{r3, lr}
 1769              	.LCFI20:
 1770              		.cfi_def_cfa_offset 8
 1771              		.cfi_offset 3, -8
 1772              		.cfi_offset 14, -4
1350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   {
 1773              		.loc 1 1350 0
 1774 0002 064B     		ldr	r3, .L212
 1775 0004 9B68     		ldr	r3, [r3, #8]
 1776 0006 13F0800F 		tst	r3, #128
 1777 000a 00D1     		bne	.L211
 1778              	.L208:
 1779 000c 08BD     		pop	{r3, pc}
 1780              	.L211:
1353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1781              		.loc 1 1353 0
 1782 000e FFF7FEFF 		bl	HAL_RCC_CSSCallback
 1783              	.LVL125:
1356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c ****   }
 1784              		.loc 1 1356 0
 1785 0012 8022     		movs	r2, #128
 1786 0014 024B     		ldr	r3, .L212+4
 1787 0016 1A70     		strb	r2, [r3]
1358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c **** 
 1788              		.loc 1 1358 0
 1789 0018 F8E7     		b	.L208
 1790              	.L213:
 1791 001a 00BF     		.align	2
 1792              	.L212:
 1793 001c 00100240 		.word	1073876992
 1794 0020 0A100240 		.word	1073877002
 1795              		.cfi_endproc
 1796              	.LFE77:
 1798              		.section	.rodata
 1799              		.align	2
 1800              		.set	.LANCHOR0,. + 0
 1801              	.LC0:
 1802 0000 02       		.byte	2
 1803 0001 03       		.byte	3
 1804 0002 04       		.byte	4
 1805 0003 05       		.byte	5
 1806 0004 06       		.byte	6
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 61


 1807 0005 07       		.byte	7
 1808 0006 08       		.byte	8
 1809 0007 09       		.byte	9
 1810 0008 0A       		.byte	10
 1811 0009 0B       		.byte	11
 1812 000a 0C       		.byte	12
 1813 000b 0D       		.byte	13
 1814 000c 0E       		.byte	14
 1815 000d 0F       		.byte	15
 1816 000e 10       		.byte	16
 1817 000f 10       		.byte	16
 1818              	.LC1:
 1819 0010 01       		.byte	1
 1820 0011 02       		.byte	2
 1821              		.text
 1822              	.Letext0:
 1823              		.file 2 "c:\\program files (x86)\\gnu tools arm embedded\\6 2017-q2-update\\arm-none-eabi\\include
 1824              		.file 3 "c:\\program files (x86)\\gnu tools arm embedded\\6 2017-q2-update\\arm-none-eabi\\include
 1825              		.file 4 "Drivers/CMSIS/Include/core_cm3.h"
 1826              		.file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
 1827              		.file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h"
 1828              		.file 7 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h"
 1829              		.file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
 1830              		.file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h"
 1831              		.file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h"
 1832              		.file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
 1833              		.file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 62


DEFINED SYMBOLS
                            *ABS*:00000000 stm32f1xx_hal_rcc.c
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:16     .text.RCC_Delay:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:22     .text.RCC_Delay:00000000 RCC_Delay
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:66     .text.RCC_Delay:00000024 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:72     .text.HAL_RCC_DeInit:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:79     .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:248    .text.HAL_RCC_DeInit:000000e4 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:256    .text.HAL_RCC_OscConfig:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:263    .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:720    .text.HAL_RCC_OscConfig:000002c4 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:726    .text.HAL_RCC_OscConfig:000002d4 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:970    .text.HAL_RCC_OscConfig:00000408 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:976    .text.HAL_RCC_MCOConfig:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:983    .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1045   .text.HAL_RCC_MCOConfig:00000044 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1051   .text.HAL_RCC_EnableCSS:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1058   .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1073   .text.HAL_RCC_EnableCSS:00000008 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1078   .text.HAL_RCC_DisableCSS:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1085   .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1100   .text.HAL_RCC_DisableCSS:00000008 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1105   .text.HAL_RCC_GetSysClockFreq:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1112   .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1187   .text.HAL_RCC_GetSysClockFreq:0000005c $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1195   .text.HAL_RCC_ClockConfig:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1202   .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1439   .text.HAL_RCC_ClockConfig:00000154 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1448   .text.HAL_RCC_GetHCLKFreq:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1455   .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1469   .text.HAL_RCC_GetHCLKFreq:00000008 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1474   .text.HAL_RCC_GetPCLK1Freq:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1481   .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1506   .text.HAL_RCC_GetPCLK1Freq:00000018 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1512   .text.HAL_RCC_GetPCLK2Freq:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1519   .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1544   .text.HAL_RCC_GetPCLK2Freq:00000018 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1550   .text.HAL_RCC_GetOscConfig:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1557   .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1679   .text.HAL_RCC_GetOscConfig:000000b0 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1684   .text.HAL_RCC_GetClockConfig:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1691   .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1729   .text.HAL_RCC_GetClockConfig:00000034 $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1735   .text.HAL_RCC_CSSCallback:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1742   .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1754   .text.HAL_RCC_NMI_IRQHandler:00000000 $t
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1761   .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1793   .text.HAL_RCC_NMI_IRQHandler:0000001c $d
C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s:1799   .rodata:00000000 $d
                     .debug_frame:00000010 $d

UNDEFINED SYMBOLS
SystemCoreClock
HAL_GetTick
HAL_InitTick
uwTickPrio
HAL_GPIO_Init
ARM GAS  C:\Users\antras\AppData\Local\Temp\ccZbZYVj.s 			page 63


AHBPrescTable
APBPrescTable
